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4:45-5:50 PM
SARC-202-2: CXL Storage (System Architectures Track)
Paper Title: Next-Gen System Architectures Based on CXL SSDs

Paper Abstract: Modern systems are architected to meet the growing data-driven processing needs. The Compute Express Link (CXL) interconnect provides seamless cache-coherent fine-grained memory access and expansion to all the computational chips in the next-gen infrastructure. Keeping up with the current trends, we propose the merger of memory and storage using the CXL interface, and adopt the new CXL interface for next-gen SSDs. This will make them accessible via memory semantics, bypassing the I/O stack for finer-grained access via hardware caches, while still allowing for traditional IO stack access for bulk transfers. With traditional SSDs, data transfer between the memory and storage devices happens only via explicit bulk copies initiated by the application or coarse-grained software-based paging and prefetching. In this talk, we present how CXL SSD enables the use of fine-grained hardware caches, reduces data movement costs and software stack complexity, and can lower overall system cost by systematically adding lower cost storage at the bottom of the memory hierarchy, using a Proof-of-Concept CXL SSD device implementation.

Paper Author: Rekha Pitchumani, Sr. Research Manager, Samsung Semiconductor

Author Bio: Dr. Rekha Pitchumani is a Sr. Research Manager in the Systems Technology Group, Samsung Memory Solutions Lab (https://samsungmsl.com/) in San Jose, California. Her work at Samsung focuses on the systems design and device architecture of next-generation memory and NAND flash SSDs, such as CXL memory/storage, Key Value SSDs and Computational Storage. Her prior work was on key-value data management for Shingled Magnetic Recording disks. She holds a doctoral degree of Computer Science from the University of California, Santa Cruz.