Paper Title: Compute Express Link (CXL): Implementations and Usage Models

Paper Abstract: Compute Express Link (CXL) is an open industry-standard interconnect offering coherency and memory semantics using high-bandwidth, low-latency connectivity between the host processor and devices such as accelerators, memory buffers, and smart I/O devices. CXL technology is designed to deliver an open standard that accelerates the next-generation data center performance. This has now become reality with member companies delivering CXL solutions showcasing interoperability between vendors and enabling a new ecosystem for high-performance, heterogeneous computing. The first CXL hardware solutions feature memory expansion, end-point support, memory disaggregation and more. This presentation will explore implementation examples for CXL and usage models that the technology is enabling.

Paper Author: Ishwar Agarwal, CXL Consortium MWG Co-Chair, CXL Consortium

Author Bio: Ishwar Agarwal is a Principal Hardware Engineer at Microsoft. Ishwar is also the CXL Consortium Technical Task Force Co-Chair.