Paper Title: Persistent xSPI STT-MRAM Enabled with both Serial SRAM and NOR Flash Protocol

Paper Abstract: Serial Peripheral Interface (SPI) is widely available in processors and FPGAs. In this presentation, we introduce STT-MRAM xSPI device capable of both Serial RAM-like operation with byte programmability while supporting erase and page-buffered program for compatibility with Serial NOR Flash protocol. The new product family enables persistent xSPI STT-MRAM adoption in both RAM and storage applications easing/re-using system design efforts. STT-MRAM xSPI product family is a 64Mb density base die with up to 256Mb density in a stacked-die package. The interface with serial, quad, and octal modes can run up to 200MHz clock frequency with a double transfer rate for maximum bandwidth. A two bank architecture supports the bandwidth with a new write scheme that enables writing 0 and 1 to magnetic tunnel junctions on the same wordline concurrently. Fast write scheme results in minimal CS/high delay time after the commands and 2-3 orders of magnitude write energy reduction over traditional NOR. Our MRAM technology can operate for unlimited read, write, and erase operations for supported life over the full industrial temperature range (-40°C to 85°C) with greater than 10 years data retention.

Paper Author: Syed Alam, Sr. Director of Design, Everspin Technologies, Inc.

Author Bio: Dr. Syed M. Alam is currently the Sr. Director of Design Engineering at Everspin Technologies Inc., leading all aspects of MRAM product design starting from the definition, feasibility, design planning and execution, and support for New Product Qualification. He graduated with a Ph.D. in Electrical Engineering and Computer Science from MIT in 2004. He currently serves as an editor for IEEE TED. He has numerous publications and over 90 patents issued on emerging memory design and 3D Integration.