Paper Title: Implementing Hash-based KV Store Without Requiring an In-Memory Hash Table

Paper Abstract: This proposed talk will present a key-value (KV) store design solution that can take full advantage of modern storage hardware with built-in transparent compression capability. The fundamental data structure of KV store is either tree-based (e.g., B+ tree and log-structured merge tree) or hash-based. In conventional practice, hash-based KV stores must use an in-memory hash table as the intermediate translation layer to map the key space onto the storage LBA (logical block address) space. This leads to a high memory cost, which is one of the main reasons why the real-world deployment of hash-based KV store pales in comparison with KV stores built upon memory-efficient tree-based data structures. This talk will present a solution that obviates hash-based KV stores from maintaining a costly in-memory hash table by leveraging computational storage drives (CSDs) with built-in transparent compression. The experimental results show that, while consuming very little memory resource, such a design solution compares favorably with the other modern KV stores in terms of throughput, latency, and CPU usage.

Paper Author: Yang Liu, Chief Architect, ScaleFlux

Author Bio: Dr. Yang Liu has been working on storage, networking and graphics industry for over 10 years, as architect and developer. Yang co-founded ScaleFlux in Oct. 2014. As chief architect, he is driving the architecture and engineering efforts to help company delivering the most cutting-edge storage computing products. Prior to ScaleFlux, Yang held various engineer positions and made significant contributions in LSI, Sandforce, Juniper Networks and S3 Graphics. He has successfully designed and brought up more than 10 PCIe networking and storage systems with high performance and aggressive power management schemes. Dr. Liu holds Ph. D. degree in EECS from Rensselaer Polytechnic Institute (RPI), where his research interests include low-power VLSI architectures on variation-tolerant DSPs, 3D integrated digital systems, high-performance communication and signal processing circuits. Dr. Liu has published 13 academic technical papers and filed many patents.