Paper Title: Memory Tiering With CXL-Attached Memory

Paper Abstract: CXL architecture will enable new platforms with distributed memory and compute. This talk will focus on how CXL-attached memory can play a significant role in Memory Tiering and application usage. Also discussed will be some CXL-attached memory use cases and solutions, application performance analysis of near memory and far memory (CXL Memory), and software- and hardware-defined memory tiering for high performance applications with distributed memory.

Paper Author: Ravi Kiran Gummaluri, Director , CXL System Architecture, Micron Technology

Author Bio: Ravi works for Micron Technology as Director , CXL System Architecture. He is responsible for defining and leading Micron’s CXL System Architecture for memory and emerging memory products. He has over seventeen (17) years of experience in leading system architecture and solutions teams with next generation interconnects ( PCIe , CCIX and CXL). He has presented various solutions on coherent interconnects in international conferences(FMS,SDC). He has demonstrated various use cases in international conferences(Super Computing , FMS, SDC, ISC) on coherent interconnects (CCIX/CXL). He has Master Degree in Embedded system Design and pursing PhD in Heterogenous and parallel computing.