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3:20-4:25 PM
DCTR-102-1: Hyperscale Applications (Data Center Applications Track)
Paper Title: Flash Induced Latency at Scale

Paper Abstract: We would like to share our learnings from monitoring and remediating flash latency at scale. At Meta, due the significant scale of the operations we have encountered various types of flash induced latency issues. This presentation will die in details about the different types of latency issues we have seen at scale. What has Meta designed in order to monitor and remediate such issues in data center production environment.

Paper Author: Vineet Parekh, Hardware Systems Engineer, Facebook

Author Bio: Vineet currently works as a Hardware Engineer at Facebook. As part of his role, he is in charge of designing and maintaining storage at scale. He has been a active member in the storage community for more than a decade. Prior to Facebook, Vineet worked at Intel where he was responsible for designing and validating solid state drives. Vineet has done his Masters and Bachelors in Electrical Engineering.