Wednesday, August 9th
8:30-9:35 AM
SUST-201-1: Sustainable Data Centers and Energy Efficiency Part 1 (Sustainability Track)
Organizer + Chairperson: Wayne M. Adams, SNIA Chairman Emeritus, SNIA

Paper Title: Low-Voltage PLP IC for Enterprise SSDs for Reliability and Cost Savings

Paper Abstract: In general, a memory system including memory devices and memory controllers are powered by a server, and in the event of an unintentional power failure, the memory system is equipped with an auxiliary power supply to prevent the loss of data being processed. The capacitors used in the auxiliary power supply are high voltage capacitors such as electrolytic capacitors, tantalum capacitors, ceramic capacitors, etc. The energy of a capacitor is proportional to the square of its voltage, and when a high voltage capacitor is used, the total amount of energy is increased by maximizing the voltage. However, auxiliary power supply devices that use high-field capacitors must use high-voltage elements when integrated into an IC, which can be very large in size and can cause problems with IC reliability. To solve these problems of auxiliary power supply using high voltage capacitors, a low voltage power loss protection integrated circuit has been developed to supply emergency power to the main system by storing/utilising energy in a low voltage charging capacitor.

Paper Author: Junguei Park, Principal Analog Design Engineer, FADU

Author Bio: Jungeui Park He is an Analog IC Design Engineer at FADU. His research interests include implementation of power integrated circuits, analog integrated circuits. He has 13 years of engineering experience in the Power IC and Analog IP Design. He is received the B.S., M.S.degrees from the School of Electronics Engineering, University of Seoul, South Korea, in 2008 and 2010, respectively.