Wednesday, August 9th
3:30-4:35 PM
DRAM-203-1: DRAM Technology (DRAM Track)
Paper Title: Memory solutions for secure and sustainable server infrastructure

Paper Abstract: Memory technology has undergone continuous innovations to meet the requirement of high performance and low cost. The revolution in lithography processes, such as the EUV process, has simplified complex DRAM fab process. The transition in DRAM cell architecture from 6F2 to 4F2 will provide additional 33% of scaling benefit. There is a growing need for sustainability. HKMG and FinFET technology are applied in the DRAM periphery and core cell to achieve power reduction. However, this requires sophisticated engineering, such as anneal process optimization and work function engineering due to the thermal budget. Reducing data movement between processors and memory devices improves the power consumption. This can be achieved via offloading memory-intensive logic operations inside memory using techniques such as PIM and sharing CXL memory resources between multiple hosts. Security exploits like Rowhammer pose a significant threat to the security of server infrastructure and need to be mitigated to ensure the data remain secure. This paper explores the latest innovations in memory technology, discussing how they can contribute to a more sustainable and secure server infrastructure.

Paper Author: Ju Jin An, STSM, IBM

Author Bio: Ju Jin is a Senior Technical Staff Member in IBM's Systems Supply Chain Organization. With over 20 years of experience in the semiconductor industry, she possesses an extensive technical background in plasma etch processes and process integration. Her responsibility includes the implementation of the main memory subsystem for IBM Power and Z systems. She holds a master’s and Ph.D. degree in Chemical Engineering from MIT.