Wednesday, August 9th
3:30-4:35 PM
SARC-203-1: CXL Memory Challenges (System Architectures Track)
Organizer: Jim Pappas, Director, Technology Initiatives, Intel

Paper Title: Advantages of optical CXL for disaggregated compute architectures

Paper Abstract: Composable data center architectures provide the ability to disaggregate compute, memory, and network fabric resources. With CXL-capable processors, accelerators, switches, and memories, massive systems can be built to coherently connect compute arrays to memory. The need to train large AI models in machine learning applications will propel the demand for disaggregated architectures. Processor-to-memory bandwidth and latency are critical factors which impact time to train large AI models. Traditional Ethernet and PCIe copper PHY technologies have latency and distance limitations and cannot scale beyond a single rack. CXL over optics can solve the distance, latency, and bandwidth challenges. This presentation will illustrate the latency and performance improvements that can be achieved through implementing an optical CXL fabric in a computing system. We will discuss the benefits of memory pooling with disaggregated memories for AI training. Evidence will show the distance advantages and interconnect area savings obtained by transmitting multiple CXL data lanes over optical fibers. Benefits of optics will be examined with results from a memory expansion application.

Paper Author: Ron Swartzentruber, Director of Engineering, Lightelligence

Author Bio: Ron Swartzentruber is the Director of Engineering at Lightelligence, Inc. and is responsible for the development of CXL-over-optics products used for inter-connecting CPUs and memory over an optical fabric. Ron has extensive experience in silicon design and architecture for the cloud networking and network communication industries and holds 21 patents for inventions conceived throughout his career.