Wednesday, August 9th
3:30-4:35 PM
DRAM-203-1: DRAM Technology (DRAM Track)
Paper Title: High Bandwidth Memory (HBM) Evolution

Paper Abstract: High-bandwidth memory (HBM) is the fastest DRAM in the industry providing the highest bandwidth between memory and the processor used in high performance computing products. The TSV structure connecting vertically stacked DRAM memory chips to the logic chip in the HBM package are responsible for the ultra-high bandwidth and high performance of HBM. The technology of interconnection and the different features on the HBM have evolved to improve the HBM function. The presentation will cover the latest analysis of the HBM memory package and die integration, this will be accompanied by Optical and high-resolution SEM Images. Improvement of the HBM bandwith is achieved through both front end and back-end manufacturing process innovations. Detailed evolution per generation and of the stacked DRAM chips of HBM memory from leading manufacturers will be discussed. The front-end technology continues to scale to provide the industry with smaller and denser DRAM dies and the back-end process is used to improved interconnection between various chips in the package. New generation HBM manufacturing cost will be compared to the latest HBM3 detailing the breakdown of different process steps.

Paper Author: BELINDA DUBE, COST ANALYST, YOLE GROUP

Author Bio: Belinda Dube serves as a Technology & Cost Analyst at Yole SystemPlus, part of Yole Group. Belinda’s core expertise is memory technology, especially DRAM and 3D NAND flash memory. At the same time, she also investigates IC technologies as well as advanced packaging. Belinda’s mission is to develop reverse engineering & costing reports. She also works on custom projects, where she works closely with the laboratory team to set up significant physical & chemical analyses of innovative memory chips. Based on the results, Belinda identifies and analyzes the overall manufacturing process and all technical choices made by the memory makers. The objectives of these analyses are to understand the structure of the device, identify all materials used, and point out the link between functionality and technology selected by the memory company. In addition, a significant portion of her mission is dedicated to a strategic technology watch, where her aim is to identify innovative memory chips and manufacturing processes. Based on her expertise, Belinda updates internal simulation tools and runs custom training sessions and demos with industrials. Belinda attends many international trade shows & conferences where she collects valuable information and meets leading memory players. She regularly has an opportunity to reveal pertinent results during key onsite presentations and webcasts. Prior to Yole SystemPlus, Belinda had the opportunity to work on several R&D projects dedicated to MEMS technologies and new semiconductor substrates. Belinda holds a master’s degree in Nanotechnology from an enginnering university INSA (Lyon, France).