Thursday, November 12th
1:45-3:15
Session A-11: Flash Controllers for Application Acceleration (PRO) (Controllers Track)
Organizer: Erich Haratsch, Senior Director Architecture, Marvell

Paper Title: Open Source Processors for Next-Generation Storage Controllers

Paper Abstract: RISC-V is a new open-source hardware instruction set architecture developed by prominent researchers at UC Berkeley, but it is now widely commercially deployed. It is designed for a wide range of applications and has subsets for everything from small embedded systems to supercomputers and rack-mounted parallel computers. It has features aimed at multicore applications and at scientific computing, as well as facilities for special or custom extensions. Since it is non-proprietary and royalty-free, it can be adopted worldwide without concern for costs or political issues. Its ecosystem is emerging rapidly to offer essential support such as IP, software tools, design software, test equipment, security, and development environments. In particular, the CHIPS Alliance, an open, collaborative organization designing open source RTL SoCs, and peripherals as well as open source software development tools, is enabling a high level of innovation for storage controllers and data center architectures.

Paper Author: Zvonimir Bandic, Sr Director of Next Generation Platform Technologies, Western Digital

Author Bio: Zvonimir Bandić is a research staff member and senior director of Next Generation Platform Technologies at Western Digital. He currently focuses on NAND and new Non-Volatile Memory (PCM, ReRAM, and MRAM) applications in data center storage and computing. He holds over 50 patents and has published over 50 peer-reviewed papers. He earned an MS and PhD in applied physics from Caltech.