Paper Title: The New Face of High-Speed Interfaces

Paper Abstract: Compute Express Link (CXL) is a high-speed CPU-to-Device and CPU-to-Memory interconnect designed to accelerate next-generation data center performance. This presentation will provide an update on the latest advancements in CXL specification development, its use cases and industry differentiators. CXL enables a high-speed, efficient interconnect between the CPU and platform enhancements and workload accelerators. Attendees will learn how CXL technology: - Allows resource sharing for higher performance - Reduces complexity and lowers overall system cost - Permits users to focus on target workloads as opposed to redundant memory management - Builds upon PCI Express infrastructure - Supports new use cases for caching devices and accelerators, accelerators with memory and memory buffers The CXL Consortium has released the CXL 1.1 Specification and the next-generation of the spec is currently under development. Consortium members can contribute to spec development and help shape the ecosystem.

Paper Author: Kurt Lender, CXL Consortium MWG Co-Chair, CXL Consortium
Siamak Tavallaei, CXL™ Consortium Technical Task Force Co-Chair & Principal Architect MS Azure, Microsoft

Author Bio: Kurt Lender is a Sr Manager at Intel, where he works on the deployment of PCIe based products. He is co-chair of the PCI-SIG Marketing Workgroup and a member of the CXL Marketing Workgroup. He has extensive experience in developing data center and communications board and system solutions. Before joining Intel, he worked at Sequent Computer Systems and RadiSys. He earned MSEE and BSEE degrees from Cornell.

Author 2 Bio: Siamak Tavallaei is Sr Principal Architect at Microsoft Azure, where he is instrumental in the development and evolution of innovative multimode and multiprocessor servers. He is also Co-Chair of the CXL Technical Task Force and Co-Lead of the OCP Server Project. Before joining Microsoft, he had a long career at Hewlett-Packard as a Server Architect. He holds over 30 patents. He earned MSEE and BSEE degrees at Utah State University.