Paper Title: Flash Evolution Demands Controller Innovations

Paper Abstract: NAND flash cell structures continue to advance, increasing storage density. This flash evolution demands new controller innovations. Firstly, it demands architectural innovation for improving flash memory reliability, shortening the access path to data, reducing latency, and alleviating the bottlenecks at I/O ports. Secondly, computational storage demands that the flash controller adds value as a compute engine. Innovative flash controller features that leverage modern NAND flash technologies to deliver flexibility, scalability, and reliability for data processing applications are described.

Paper Author: David Wu, CEO, YeeStor Microelectronics

Author Bio: David Wu is the CEO of YEESTOR, a fabless provider of storage controllers that formed from the merger of Auspitek and SiliconGo in 2017. Under Mr. Wu’s guidance, YEESTOR has become a leading provider in the industry. While at SiliconGo, he was a lead researcher for the development of 10 chips from design, to tape out, through mass production. He has applied for nearly 30 patents in China and received a master’s degree from Tsinghua University, earned double master’s degree from Beihang University and Florida International University.