Paper Title: Gen-Z: The Best Interface for Emerging Memory Technologies

Paper Abstract: Most processor-memory interfaces assume a fixed type of volatile memory (usually DRAM). Other variations (such as static memory or ROM) require special interface hardware to operate on the memory bus. Gen-Z is a new data access fabric that abstracts the memory media, breaking the processor-memory interlock and allowing for a variety of memory types and operations. Memory may be persistent (that is, act like very fast storage), and operations may occur in it (that is, memory-centric or in-memory computing). Multiple paths may allow for multiple channels or protect against faults. With Gen-Z, new memory types can provide a wide range of functions for advanced applications without any need to slow down the memory bus or change its basic architecture. Memory and processors can now follow separate and independent innovation paths, increasing the capabilities of computers to handle new applications involving big data, real-time analytics, AI/ML, and edge computing.

Paper Author: Valerie Padilla, Technology Strategist, Server CTO, Dell EMC

Author Bio: Valerie Padilla is a Technology Strategist in the Office of the Server CTO at Dell EMC where she evaluates emerging technologies, designs conceptual architectures, and performs strategic studies. She is currently laser focused on memory-centric and composable architectures, collaborating with vendors in evaluating fabric technologies such as PCIe, NVMe-oF, and Gen-Z. She is also strongly interested in software-defined storage and open-source projects such as Ceph. She has over 10 years experience with Dell as a performance, system, and software engineer. Valerie earned a BSEE from the University of Texas at Austin.