Paper Title: FTL Flow Control for CFexpress Camera Hosts Using Large Sequential NVMe Reads

Paper Abstract: CFexpress Camera hosts have large command buffers and thus use a high NVMe MDTS (Maximum Data Transfer Size) of 32MB. Typical flash controllers break down the NVMe sequential read command to die size (32KB) and queue them to low-level firmware queue (flash sequencer), with typical queue size double the number of dies (typically 32-in 16 die product, thus total of 1024KB size command can be handled). Thus, 32MB-size read command is broken down to 1024 requests that cannot be held in the above queue and requires FTL to design flow control to queue commands in low-level firmware queue until space remains in queue. If no space is left in queue, FTL suspends processing the commands from NVMe I/O submission queue until low-level firmware queue is full. Additional complexity is during queue depth and mixed reads patterns where FTL must simultaneously handle short random commands and large sequential commands. Here, FTL must balance flow control such that it doesn't delay processing the short random commands when large sequential command is being processed and FTL is waiting for the result of L2P (Logical-to-Physical) address translation.

Paper Author: Vishwas Saxena, Technologist, Firmware Engineering, Western Digital

Author Bio: Vishwas Saxena is Technologist of Firmware Engineering at Western Digital, where he is both project lead and project architect for NVMe-based CFexpress removable cards. He has been a leader in creating new product lines, and in designing and debugging complex software systems such as flash firmware. Saxena has seven years’ experience in firmware development and almost 20 years’ experience in the technology industry. His strong background includes experience in embedded software, wireless systems, device drivers, and networking. He earned a Bachelor’s in computer science from the Netaji Subhas Institute of Technology (Delhi, India).