Paper Title: A novel HW/FW co-designed SSD controller archtecture to boost up SSD performance

Paper Abstract: Moving from SATA to PCIe, host interface is no longer the bottleneck of SSD performance, and NVMe opens a great opportunity to fully exploit the NAND flash bandwidth. However, based on the conventional SSD controller architecture, FW with too heavy workloads becomes a major obstacle to approach the performance limitation of PCIe NVMe SSD, especially the random access performance. Although multiple processors are applied in high-end SSD controllers to boost up PCIe NVMe SSD performance, this conventional SSD controller architecture significantly complicate FW, which leading to significant FW reliability and power/thermal issue. A promising solution is to offload FW workloads through a cross layer design methodology to fully integrate FW and HW. With fully studying of the SSD systems, a HW/FW co-designed controller architecture is proposed to dramatically improve the FW efficiency, such as command translation, buffer and NAND managements. The performance result of Maxio's SSD controller shows that this novel SSD controller architecture could achieve 800K random read IOPS with very light FW.

Paper Author: Wei Xu, Vice President, Maxio Technology

Author Bio: Wei Xu serves as VP R&D for Maxio Technology. He is responsible for leading the engineering group that develops the innovative solid-state disk (SSD) controller products. Before joining Maxio, he was a Design Manager at Marvell Semiconductor. Dr. Xu received a Bachelor of Science degree and a Master of Science degree from Fudan University in Shanghai, and Ph.D. in Electric Engineering from Rensselaer Polytechnic Institute (RPI) in US.