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8:30-10:50 AM
CTRL-201-1: Controllers and Flash Technology, Part 1 - Hardware and Algorithms (Controllers Track)
Paper Title: Towards data-driven NAND flash controller development

Paper Abstract: We perform a deep dive into the potential of data-driven controller development and present how insights from large-scale analytics on call-home data can be leveraged to improve controller designs. Call-home data has been the first source for analyzing field issues in enterprise storage systems without accessing actual customer data. Recently, this information has been further leveraged to better address customer needs such as accurate capacity usage prediction. From a flash controller perspective, there is more that can be done: The increasing complexity in the cell architecture, layering, and process limitations lead to idiosyncrasies that must be mitigated. While efficiency of mitigation techniques can be estimated from simulation, characterization, and testing, the interplay of these techniques becomes increasingly complex. Yet, the actual performance (e.g., latency, bandwidth, and endurance) not only depends on workload properties, but also on the interplay of these mitigation algorithms. This is where call-home data becomes key for enabling improved controller designs as we show based on particular examples analysed from a large number of all-flash arrays in the field.

Paper Author: Roman Pletka, Research Staff Member, IBM Research

Author Bio: Roman Pletka is a research staff member and master inventor for cloud storage and analytics at the IBM Zurich Research Laboratory where he focuses on non-volatile memory technologies in storage systems. He has published more than 20 articles and obtained over 70 patents in managing non-volatile memories, security, scalability, and availability of distributed storage systems as well as quality-of-service in high-speed networks, active networks, and network processors. He has made presentations at many international conferences including the ACM International Conference on Systems and Storage (SYSTOR) and the Nonvolatile Memory Workshop. He has over ten years experience in storage systems research. He earned a PhD in computer networking from ETH Zurich, Switzerland and an MS in the same subject from EPFL (Swiss Federal Institute of Technology of Lausanne).