Paper Title: Accelerating Converged System Performance with FPGA-Based Switches

Paper Abstract: Integration of switch, storage and compute can accelerate the performance of flash storage in data centers. To support high data volume and throughput, todays storage switches require large buffering capacity to transfer packets; otherwise, the system must slow down frequently to avoid losing packets during high-speed bursts. A simple solution is a converged node implemented on an FPGA; it is essentially a switch with directly connected flash memory that can store data locally during bursts and then migrate it when network capacity is available. Additionally, this node enables data plane utilities (such as compression or encryption) to be rapidly accessed on-the-fly around the network. The custom nature of an FPGA solution allows services to be performed anywhere, thus reducing stress on network resources. For instance, time-consuming functions can be handled efficiently at the point of origination, reducing network congestion and decreasing processing latency.

Paper Author: Quinn Jacobson, Strategic Architect, Achronix

Author Bio: Quinn Jacobson is currently Strategic Architect at Achronix, a developer of extremely high-performance FPGAs. Before joining Achronix, Quinn designed the first commercial soft-core IP blocks for FPGAs at Altera, and was chief architect for Sun Microsystems’ SPARC processors. He also was co-founder of a wearables technology startup and led software and hardware projects at Intel and Nokia. He holds 68 granted US patents. He earned a PhD in Electrical and Computer Engineering from the University of Wisconsin - Madison.