Paper Title: Component-Level Characterization of 3D TLC, QLC, and Fast SLC NAND

Paper Abstract: The Flash industry transition from 2D to 3D NAND has enabled the use of triple-level cell (TLC) NAND in enterprise applications, as 3D TLC demonstrates significantly improved endurance over its 2D predecessor. The transition to 3D NAND has also enabled the development of quad-level cell (QLC) NAND, trading off endurance and timing parameters to minimize cost-per-GB. Finally, the commercial availability of persistent memory technologies has precipitated the development of fast single-level-cell (fast SLC) NAND in response, trading off die density and cost-per-GB to minimize read latency. This presentation will focus on component-level characterization of enterprise-grade 3D TLC, QLC, and fast SLC NAND from multiple suppliers across multiple generations. The presentation will compare characterization results based on real-world use-case scenarios for these three distinct varieties of 3D NAND, with attention given to cycling endurance, timing parameters, and susceptibility to data retention and read disturb failure modes. The presentation will also discuss specific implementation challenges that must be overcome to integrate each variety of 3D NAND into enterprise applications.

Paper Author: Patrick Breen, Flash Characterization Engineer, IBM

Author Bio: Patrick Breen is the flash characterization lead engineer at IBM, primarily focused on NAND component-level characterization for enterprise applications. He has performed characterization on several recent generations of NAND flash, including both 2D and 3D NAND and MLC, TLC, QLC, and fast SLC varieties. He earned his B.S. in electrical and computer engineering at Rice University (Houston, TX), where he graduated summa cum laude.