Paper Title: Key-Value Store and NVMe Deliver Close to DRAM Performance

Paper Abstract: Many applications require low-latency data store services, a requirement typically satisfied using key-value stores backed by DRAM. However, large amounts of DRAM are very expensive. Also, recently introduced storage devices built on novel NVM technologies offer far higher performance than conventional SSDs. uDepot is a new key-value store built bottom-up to deliver the performance of fast NVM block-based devices. It is crafted carefully to avoid inefficiencies, uses a two-level indexing structure that adjusts its footprint dynamically to match the inserted items, and employs a novel task-based I/O runtime system to maximize performance. As an embedded store, uDepot's performance nearly matches the raw performance of fast NVM devices for both throughput and latency, while being scalable across multiple devices and cores. Using the popular Memcache protocol, it can deliver performance to network clients that is very close to DRAM-based systems. It offers much higher caching capacities at dramatically reduced cost in dollars per gigabyte. A uDepot-based memcache service is currently available as an experimental service in the IBM cloud.

Paper Author: Nikolas Ioannou, Research Staff, IBM Zurich Research Lab

Author Bio: Nikolas Ioannou is a Research Staff Member at IBM Research Zurich, where he works on nonvolatile storage, distributed file systems, data reduction algorithms for distributed storage, and systems aspects of machine learning frameworks. He is currently working on the uDepot data store optimized for NVMe storage, acceleration of machine learning systems, and the Snap ML library which provides high-speed training of popular machine learning models. He holds over 50 granted patents and patent applications and has authored articles in journals such as the ACM Transactions on Storage and the IBM Journal on Research and Development and presentations at many major conferences including Usenix Conference on File and Storage Technologies (FAST) and IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS). He has also presented at past Flash Memory Summits. He earned his PhD in computer science from the University of Edinburgh (UK).