Paper Title: Building NVMe storage systems with PCIe 4.0 embedded switch IP

Paper Abstract: With the explosive growth in the NVMe based storage market, system vendors are continuously looking for ways to differentiate, whether with pure I/O performance, system scalability, or other value add. While an off-the-shelf PCIe switch chip can be used for connecting multiple NVMe SSDs to a processor subsystem, its fixed architecture and feature-set limit its appeal for building future-proof storage systems. In this presentation, we show how a customizable, smart PCIe 4.0 embedded switch IP can help build scalable, high-performance, and intelligent NVMe storage systems. We look at different aspects of the solution, including general system architecture, traffic routing management for high performance and low latency, in-the-flow co-processing offload, and technology implementation options

Paper Author: Sampath Banka, Senior Applications Engineer, PLDA

Author Bio: Sampath Banka is Sr. Applications Engineer at PLDA Inc. He has over 10 years of experience in Design & Verification and over 5 years of experience in PCI Express IP cores Integration, Debug and Verification. He has worked with PLDA's customers and PHY partners worldwide to help them with PHY interoperability, integration and debugging of PCIe Express based designs. Sampath holds a B.E in Electronics and Communications Engineering from Anna University, India and PGDVLSI from TIIT, San Jose.