Paper Title: An Advanced Error Recovery Scheme for Open-Channel SSDs

Paper Abstract: Open-Channel and NMVe SSDs play important roles in enterprise storage and data center. With the goal of improving QOS consistency, isolation requirements make random read/write latency one of the most important factors in SSDs. While maintaining reliability, NAND error recovery flow on high capacity 3D SSDs continues to become more complex impacting the latency, cross chip and plane RAID considerations. This presentation will propose an advanced error recovery flow scheme for use with 3D TLC/QLC flash, and will explore endurance group limitations.

Paper Author: Jeff Yang, Principal Engineer, Silicon Motion

Author Bio: Jeff Yang is a Principal Engineer in Silicon Motion's Algorithm & Technology team. He previously worked at Realtek on several Wi-Fi projects. He has a Masters in EE from National Taiwan University, and his research was in error correcting codes addressing effective encoding/decoding algorithms and VLSI architectures. His current research includes error correcting codes system for NAND flash.