Paper Title: Predicting I/O Patterns Using LSTM Neural Networks in Storage Systems

Paper Abstract: Accurately predicting storage I/O patterns can help improving performance and endurance of flash memory SSDs. The current state of the art made efforts on building machine learning models to find storage I/O pattern and implement the model in software to predict the future I/O behavior. However, the latency of existing predictions is not neglectable. In this talk, we introduce and explain an LSTM (Long Short-Term Memory) neural network solution to detect I/O intensity and idle periods inside storage device in real time. It is a supervised learning model whose training phase is offline in software and testing phase is online in hardware. Testing results have shown promising results.

Paper Author: Ken Qing Yang, Chief Scientist, Dapu Microelectronics

Author Bio: Qing Yang is Distinguished Engineering Professor in the Department of Electrical, Computer, and Biomedical Engineering at University of Rhode Island where he has been a faculty member since 1988. He is a director of High Performance Computing Lab (HPCL) of URI and is a recipient of 8 accomplishment awards while serving at URI such as Faculty Excellence Award, Distinguished Engineering Professor Award, Outstanding Intellectual Property Award. His research interests include computer architectures, memory and storage systems, computer networks, embedded computer systems and applications in neural-machine interface and biomedical engineering. He has published over 100 high quality technical articles in these research fields and held over a dozen issued patents and over a dozen pending applications. Majority of his patents have been licensed to computer industry with significant practical impact. Four high tech startup companies have been formed based on his patents. His latest startup, VeloBit, was based on his newly proposed concept: Content Locality, and was successfully acquired by Western Digital in July 2013. He has graduated 11 PhD students, of whom 4 are faculty members at major universities and others are leading researchers in computer companies such as Intel, Xerox, and EMC. Yang is a Fellow of IEEE. He has served in the professional society in various capacities including general chair of the ACM/IEEE International Symposium on Computer Architecture (ISCA2011), IEEE international Conference on Network, Architecture, and Storage (NAS), IEEE Workshop on Storage Network Architecture and Parallel I/Os (SNAPI); IEEE Distinguished Speaker; Editor of IEEE Transactions; and Program Committee member of numerous international conferences. Besides being a principal investigator of many academic research projects, Yang has also done collaborative research with IBM, Intel, EMC, Freescale, and several startup companies in the Boston area. He received his B.Sc. in computer science from Huazhong University of Science and Technology, Wuhan, China, in 1982, M.A.Sc. in electrical engineering from University of Toronto, Canada, in 1985, and Ph.D degree in computer Engineering from The Center for Advanced Computer Studies, University of Louisiana, Lafayette, in 1988.