Wednesday, December 5th
2:00-3:15 PM
HRDW-101: Designing NVMe/NVMe-oF Controllers (Hardware Track)
Chairperson: Deepankar Das, CTO, Sureline Systems

Organizer: Rakesh Cheerla, Solution Planner, Intel

Co-Organizer: Sean Gibb, VP Software, Eideticom

Paper Title: Increasing System Throughput by Adding Compute Power to NVMe Controllers

Paper Abstract: Distributing compute power to storage nodes (creating so-called computational storage) leads to greater scalability, simpler upgrading, and better fault tolerance. It also reduces the strain on system-level resources and networks. It is particularly valuable now that new technologies such as NVMe and persistent memory have greatly increased the speed of storage accesses, often overwhelming the ability of other parts of systems to keep up. The approach is also well-suited to new applications such as real-time analytics, artificial intelligence/machine learning, virtual and augmented reality, autonomous systems, IoT, and cybersecurity. Controllers are the logical place to add compute since the additional cost is small and the compute capability can also be used for other purposes such as providing programmability and other advanced features.

Paper Author: Scott Shadley, VP Marketing, NGD Systems

Author Bio: Scott Shadley is VP Marketing at NGD Systems, a developer of computational storage. He focuses on brand, go-to-market, and product management and development, as well as customer adoption, acquisition, and support. He was previously Principal Technologist at Micron, where he focused on future technologies such as form factors, interfaces, and connectivity options with a particular emphasis on giving customers more freedom with their uses. He has spent over 20 years in the semiconductor and storage industries, and his efforts have been important in developing and marketing products with over $300M revenue. He has also been active as a conference presenter and organizer, particularly at Flash Memory Summit. He earned an MBA from the University of Phoenix and a BS in Semiconductor Device Physics from Boise State University (ID).