Wednesday, December 5th
|HRDW-101: Designing NVMe/NVMe-oF Controllers (Hardware Track)|
|Chairperson: Deepankar Das, CTO, Sureline SystemsOrganizer: Rakesh Cheerla, Solution Planner, IntelCo-Organizer: Sean Gibb, VP Software, Eideticom|
Paper Title: Ultra Low Latency NVMe-oF Controller Design
Paper Abstract: Adopting a disaggregated compute and storage architecture in a data center provides optimal return on investment by improving resource utilization, cost efficiency, and scaling. However, existing NVMe-oF solutions cannot harness the low latency benefits of next-generation storage technologies. The problem is that the solutions require a protocol conversion (NVMe-oF to NVMe) that adds a latency overhead of about 3 microseconds, which is significant. An NVMe-oF SSD with a unique controller design, integrating the fabric transport layer and the flash controller on a single SoC, eliminates the protocol conversions. Experimental results show that the proposed NVMe-oF design can provide latency comparable to that of direct attached storage (DAS). The smaller footprint of integrated SoC design with reduced cost and power can be the key for building next-generation end-to-end NVMe-oF solutions.
Paper Author: Swati Chawdhary, Senior Manager, Samsung
Author Bio: Swati Chawdhary is a Senior Manager at Samsung with over 15 years of storage industry experience. Her recent work focuses on the development of NVMe-oF/NVMe controllers and all flash array reference designs. Before joining Samsung, she worked at Chelsio Communications, where she contributed to the development of their Unified Wire Adapters. She earned a Bachelor's degree in Computer Science from the Savitribai Phule Pune University (India).