Paper Title: Overview of Persistent Memory Hardware and JEDEC NVDIMM Standards

Paper Abstract:

Paper Author: Bill Gervasi, Principal Systems Architect, Nantero

Author Bio: Bill Gervasi, Principal Systems Architect at Nantero, is a long-time prominent leader in the memory business, active since the days of 1Kb DRAMs and EPROMs. As an analyst/consultant, he has led seminars, made conference presentations, written articles, taught courses, acted as an expert witness in major patent cases, and provided comments and quotations for many industry publications. He has been very active in JEDEC, where he currently serves as Vice-Chair of the DRAM modules committee. He has served on the JEDEC Board of Directors and has chaired committees for DRAM parametrics and small form factor memory modules. He worked on the definition of all Double Data Rate SDRAMs since inception. He also helped form the JEDEC committee on SSDs and is active in the definition of NVDIMMs. Before becoming an independent analyst, he spent almost 20 years at Intel as a Systems Hardware Designer and Software Designer. He holds 10 patents in memory and packaging design. He studied computer science at University of Portland and the Oregon Graduate Center.