Thursday, August 9th
2:10-3:25 PM
CTRL-302A-1: Flash Controller Design Methods (Controllers Track Track)
Chairperson: Ludovic Danjean, Staff Engineer, Seagate

Organizer: Erich Haratsch, Director, Engineering Flash Channel Architecture, Seagate

Paper Title: Programmable Storage Controllers Permit Rapid Response to New Technologies

Paper Abstract: Non-volatile memory technologies, including both flash and other approaches, are advancing rapidly. How can solution providers cope with a stream of new variations of 3D flash, multiple-cell methods (such as QLC), and alternative device architectures such as MRAM and 3D XPoint? One promising way to provide faster development is to use programmable controllers. They allow the changing in software of parameters and routines within the controller to allow for different underlying technologies or characteristics. Programmable controllers shorten design time, allow for rapid response to updates and revision cycles, and reduce the risk of starting designs using pre-production samples.

Paper Author: Chris Bergman, Sr Firmware Architect, Burlywood

Author Bio: Chris Bergman is a Senior Firmware Architect at Burlywood, a storage controller startup where he focuses on characterizing and integrating next generation nonvolatile media into their product portfolio. Before joining Burlywood, he was a Senior Member of Technical Staff and Firmware Architect at Micron during their 3D NAND TLC transition focusing on media characterization and error recovery algorithms. He has also worked in the storage industry in firmware architecture and technical lead roles at Western Digital, and on storage technologies at InPhase Technologies. His work with extremely complex and high error rate holographic media (well beyond current 3D NAND TLC and QLC) has prepared him well for the challenges of the coming generations of non-volatile media. He earned a BSEE from Lehigh University (PA) and an MSEE from Johns Hopkins University.