Paper Title: Adapting Controllers for STT-MRAM

Paper Abstract: STT-MRAM product is emerging as a unique, value added memory technology. Integrating STT-MRAM into a system design requires awareness of the characteristics of the product that affect how the device interfaces with a given system. Ideally STT-MRAM would be fully compatible with existing standard interfaces but there are some constraints associated with a persistent memory that need to be considered. Because STT-MRAM has very fast write characteristics, it is possible to modify existing DDR3 or DDR4 DRAM controllers to make them compatible with this new memory. This presentation will explain the areas of difference and how they are handled in a controller design. New interface proposals also need to comprehend items such as variable latency and ensuring data persistence.

Paper Author: Joe OHare, Marketing Director, Everspin

Author Bio: Joe is leading the product marketing effort at Everspin Technologies, bringing new MRAM solutions to the market with an emphasis on accelerating data storage. Joe has 30 years of experience in the semiconductor industry working at TI, Lucent, and Agere Systems. He has held a variety of engineering, marketing and executive positions with a focus on the storage industry, both magnetic and solid state.