Thursday, August 9th
8:30-10:50 AM
NVME-301-1: PCIe/NVMe Technology Update (NVMe Track Track)
Organizer + Chairperson: Rakesh Cheerla, Solution Planner, Intel

Co-Organizer + Co-Chair: Deepankar Das, CTO, Sureline Systems

Paper Title: Fast MRAM Write Buffers Make I/O Determinism Practical

Paper Abstract: Storage designers typically use DRAM and supercapacitors to protect against power loss in computers, servers, and storage systems. However, this approach has serious drawbacks due to the thermal unreliability of capacitors and the large board surface area they use, as well as the limited memory space available in power loss protected buffers. An alternative is to use MRAM instead of DRAM, thus eliminating the need for supercapacitors. MRAM is non-volatile, fast operating, low-power, and long-lived. MRAM does require special programming and interfacing techniques to take full advantage of the technology at the device and system level, particularly since the per-bit cost of the technology is much higher than flash. As per-bit costs continue to drop, MRAM will play an ever larger role in power loss protection, particularly for high throughput applications such as NVMe, PCIe switching, and NVMe-oF.

Paper Author: Rizwan Ahmed, VP Corporate Marketing, Everspin

Author Bio: