Wednesday, August 8th
8:30-10:50 AM
TEST-201-1: Testing/Performance Analysis (Testing Track Track)
Organizer: Joseph Chen, VP Engineering, ULINK Technolgy

Co-Organizer + Co-Chair: Easen Ho, President, S3 Metrics

Paper Title: An Advanced Flash Emulator for Designing Today’s High-Capacity Controllers

Paper Abstract: Designing complex NAND flash controllers is a difficult business. Designers must test the logic on something that resembles the final device configuration before it has been fully defined or built. And often the memory ICs are not even available! The usual solution is to use an emulator (often jerry-built or home-grown) to replace the target devices. However, such emulators are typically limited in scope and flexibility and lack the large capacities (hundreds of GB per channel) in actual use today. A new approach employs PCIe-based FPGA boards attached to the PCIe slots of a high-end Xeon server. It uses the server’s DRAM as a huge shared memory that each emulated channel can access independently. The emulator is programmable, supports standard memory interfaces, and can emulate a large memory area (supporting multiple channels). It has been prototyped and tested with various DUTs. Experimental results show that all timing requirements are satisfied under maximum read/write workloads. High-level software allows the collection and processing of various statistics on the fly.

Paper Author: Theodore Antonakopoulos, Professor, University of Patras

Author Bio: Theodore Antonakopoulos is a Professor in the Electrical and Computers Engineering Department of the University of Patras (Greece). He leads the Cognitive Computing Machines and Embedded Systems (COMES) group at the university with research focusing on storage systems, in-memory computing, and hardware accelerators. He holds 10 patents in memory and storage technology, mostly related to work done in conjunction with IBM researchers, with two more in process. He spent a sabbatical year at IBM Research Laboratory in Zurich, Switzerland, where he worked on hardware development for storage devices. He has also published many papers and given or contributed to many conference presentations (including ones at the UCSD Non-Volatile Memory Workshop) on memory-related subjects with special emphasis on phase-change memory, PCIe-based storage, and emulators. He earned his PhD in electrical engineering at the University of Patras (Greece).