Paper Title: A New Erasure Pointer Generation Scheme for Storage Class Memory

Paper Abstract: In this paper, we present a new method for generating erasure pointers for Storage Class Memory (SCM) applications. This method could be utilized by a wide variety of ECC systems such as LDPC, RS and BCH. In the presence of defects or stuck bits, it could potentially doubles the error correction capability of the ECC relative to randomly distributed error locations. It involves write-in-place the inverted user data and identifying the bits that fail miscompare between the written and read back data. These identified error bit locations be utilized by the ECC erasure hardware as defect pointers. Alternatively, the entire data packet could be inverted back (except for those erasure locations) and get sent back to the decoder input buffer for another decoding attempt. We are able to demonstrate that code word failure rate decreases exponentially with the number of correctly identified erasure locations.

Paper Author: Mai Ghaly, Sr. Technologist, WDC

Author Bio: Mai Ghaly obtained her Ph.D. from the University Illinois Urbana-Champaign in 1998 in Materials Science. Here thesis topic was “Molecular Dynamic Simulation of Ion Surface interaction. After which she joined Seagate Technology where she worked on transducer design and enterprise HDD as lead reliability feature designer. In 2014 she moved to Western Digital where she is currently working on SCM integration into SSD.