Paper Title: Raising QLC Reliability in All-Flash Arrays

Paper Abstract: Benefitting from high performance, low power consumption, and high density, flash has emerged as a major component in data centers. However, cost and density issues still limit its usage. QLC flash can offer higher density and lower cost. Although it cannot provide the read/write performance of MLC or TLC, it can offer a reasonable user experience in all-flash arrays (AFAs) except for the reliability problem. The best way to increase QLC reliability in AFAs is to implement a hierarchical recovery flow. It compensates for QLC error behavior, SSD failure types, and the FMEA for data access in an AFA. When failure prediction and early data reconstruction are implemented, the data will always be ready with the shortest latency when users are want to get it from the NAND flash. A vertical integration method protects the entire path between the data supplied by the user and the data stored on the NAND flash.

Paper Author: Jeff Yang, Principal Engineer, Silicon Motion

Author Bio: Jeff Yang is a Principal Engineer on the Algorithm and Technology team at Silicon Motion. His research in error correcting codes addresses effective encoding/decoding algorithms and VLSI architectures and has been used in many controllers. His current research interests include error correcting codes for NAND flash applications. He has given presentations on coding for controllers at many previous Flash Memory Summits. He holds an MSEE from the National Taiwan University, Taiwan.