Paper Title: 3D TLC NAND Component-Level Characterization Based on Real-World Enterprise Work

Paper Abstract: The flash industry transition from 2D to 3D NAND has enabled the use of triple-level cell (TLC) NAND in enterprise applications. The first generation of commercially-available 3D TLC NAND demonstrated significantly improved endurance over its 2D predecessors. The second generation builds on this advantage, increasing layer count to maintain monolithic die density growth and cost-per-GB reduction trends. A new key test issue is component-level characterization of mature enterprise 3D TLC NAND from multiple suppliers. Recent research has provided component-level characterization results based on real-world enterprise NAND use-case scenarios. Targeted testing results allow design and development teams to evaluate specific 3D NAND design features that impact use in enterprise applications.

Paper Author: Patrick Breen, Flash Characterization Engineer, IBM

Author Bio: Patrick Breen is a flash characterization engineer at IBM, primarily focused on NAND component-level characterization for enterprise applications. He has performed characterizations for several recent generations of NAND flash, including both 2D and 3D and SLC, MLC, and TLC variations. He earned his BS in electrical and computer engineering at Rice University (Houston, TX) where he graduated summa cum laude.