Tuesday, August 8th
Tuesday, August 8th
8:30-9:35am
Invited Talk 1: NVMe Over Fabrics-High Performance Flash Moves to Ethernet (NVMe-oF Track Track)
Organizer: Brian Berg, President, Berg Software Design

Chairperson: Sammy Nachimuthu, Sr. Principal Engineer, Intel

Paper Presenters:
NVMe Over Fabrics-High Performance Flash Moves to Ethernet
Rob Davis, ,

Session Description:
File, block and object storage can all take advantage of current NAND flash to improve performance. But even higher performance is now available as RDMA-based storage technology originally developed for the HPC industry moves to the mainstream. By enhancing a storage system’s network stack with RDMA, users can see an even more dramatic improvement than by just adding flash. The technology increases performance across-the-board, accelerating file, block, and object-based applications. With even faster persistent memory on the way, RDMA is a key factor in eliminating the network stack bottleneck. It utilizes ultra-low latency network interfaces to achieve eye opening performance improvements for storage solutions.
About the Organizer/Moderator:
Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA, and Fibre Channel; and Storage Area Networks (SAN), and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer, and technical writer. He has participated in over 80 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters degree coursework at Stanford University.

Murugasamy (Sammy) Nachimuthu is Senior Principal Engineer at Intel Corporation. Sammy is currently working on the Rack Scale Design (RSD) architecture including NVMe over Fabric management and other storage technologies. Sammy played a key role creating OS and manageability interface standards for persistent memory such as NVDIMM Firmware Interface Table (NFIT), Heterogeneous Memory Attributes Table (HMAT) and persistent memory models for Redfish.

Tuesday, August 8th
8:30-9:35am
Session 101-A: Consumer Applications (Consumer/Mobile Applications Track Track)
Organizer + Chairperson: John Geldman, Director, SSD Industry Standards, Toshiba

Paper Presenters:
Improving Test Procedures for Consumer SSDs
Andrew Mierau, Sr Technical Marketing Engineer, Micron

Improving the Design of RAM-less Consumer SSDs
Sean Yang, Account Manager, Phison Electronics

NVMe BGA: NVMe in a Small Form Factor
Balaji Venkateshwaran, Director SSD Strategic Marketing, Toshiba

Session Description:
Consumer electronics remains a major market for solid state storage. Manufacturers continue to try to improve every aspect of their products, including performance and test procedures. Security is an area of increasing concern. Devices are constantly wearing out, failing, or being discarded. How do we make sure that data on them is completely erased rather than being available for recovery from a discard or trash pile?
About the Organizer/Moderator:
John Geldman is Director SSD Industry Standards at Toshiba. He focuses on standards for cloud storage, HDD and SSD storage devices, data security, and persistent (storage class) memory. His previous standards committee engagements include INCITS T10 and T13, NVMe, PCI-SIG, SATA-IO, TCG, SFF, SNIA, OSF, OCP, and JEDEC. He is well-known as a storage interface leader adept at guiding standards organizations and architecting groundbreaking technical developments. His specialties include SSD architecture, IP development, storage security, and storage card products. He was previously Director Industry Standards at Micron, where he led the company’s participation in such standards bodies as T10, T13, SATA, IEEE 1667, USB, CompactFlash, and the SD Association. He has also worked for Brecis Communications, Basis Communications, and Cirrus Logic. He holds 9 patents and has been recognized for his standards work by the SD Association and INCITS. A frequent blogger and conference contributor, he has been a speaker, organizer, and chairperson at Flash Memory Summit, as well as being a member of the Conference Advisory Board. He holds an MSCS from Santa Clara University and a BSECE from Clarkson University.

Tuesday, August 8th
8:30-9:35am
Session 101-B: Embedded Applications, Part 1 (Embedded Applications Track Track)
Organizer: Tom McCormick, Chief Engineer/Technologist, Swissbit

Chairperson: Bill Wong, Technology Editor, Electronic Design Magazine

Paper Presenters:
Optimizing SSDs for Embedded Applications Using Overprovisioning
Peter Huang, Senior Manager, Product Management, ATP Electronics

Improving Lifetime Estimates for Embedded Flash
Tom McCormick, Chief Engineer/Technologist, Swissbit

3D Flash Leads to More Powerful Embedded Applications
Thomas Hsiao, Sr Field Applications Engineering Manager, Phison Electronics

Using MLC Flash to Reduce Systems Costs in Industrial Applications
Chris Budd, Director Engineering, SMART High Reliability Solutions

Session Description:
Flash storage is becoming important factor for both consumers and in the enterprises. Benefits of flash storage are many, but much higher cost of flash storage as compared to traditional storage is making it hard to justify financially buying of the flash storage. What many storage customers don’t necessarily realized that price per megabyte or gigabyte of capacity is outdated model and it does not represent true cost of storage. Many enterprise consumers of storage keep buying more and more hard drives, not to satisfy capacity requirement, but to satisfy performance requirement, but when total cost of ownership is taken into consideration, flash storage becomes very competitive with much smaller footprint, cooling and power requirements. There are also certain workloads, which can benefit tremendously from using flash storage and those will be discussed in this presentation.
About the Organizer/Moderator:
Thomas McCormick is currently Chief Engineer/Technologist at Swissbit, where he leads market focused R&D for product development and full life cycle support. He has over twenty years experience designing PC and embedded computer systems, including over fifteen years focused on flash memory product research and development.. His ongoing research is focused on flash memory and next generation non-volatile memory systems for highly reliable storage in embedded applications. He has presented at Flash Memory Summit and the Non-Volatile Memory Workshop, and has published an article on embedded flash in EE Times. He holds a PhD in Computer Engineering from Northeastern University, an MBA and an MS in Computing Engineering from the University of Massachusetts at Lowell, and an MSME and BSME (summa cum laude) from Drexel University.

Bill Wong is Embedded/Systems/Software Technology Editor at Electronic Design Magazine. He writes several columns, including the popular Lab Bench, alt.embedded, and Bill’s Workbench hands-on column. He has written a dozen books and was the first Director of PC Labs at PC Magazine. He has worked in the technology industry for almost 40 years, including over 15 years with Electronic Design. He is a frequent conference participant as a speaker, chairperson, and organizer, including Embedded Systems Conference. He holds a BSEE from Georgia Tech and a Master’s in computer science from Rutgers.

Tuesday, August 8th
8:30-9:35am
Session U-1: Annual Update on Flash Technology (Flash Technology Track Track)
Chairperson: Satoru Araki, Senior Director, Program/Product Management, Spin Transfer Technologies

Organizer: Leah Schoeb, Technology Evangelist/Architect, Rubrik

Paper Presenters:
Session Description:
Is NAND flash at a crossroads? Is the end of scaling near? How is 3D flash doing? Are the reported production problems real and how important are they? What’s the real story with 3D XPoint™? In practice, NAND flash technology keeps advancing with manufacturers reporting successful products at ever-smaller dimensions. 3-D flash is in production, as the transition continues. Flash memory remains the dominant non-volatile memory technology near term, and the 3D developments mean it will retain that status for years to come.
About the Organizer/Moderator:
A technology management executive with over 15 years experience, Dr. Satoru Araki is currently Director Head Program Management and Platform Development at HGST, a Western Digital company. He serves as technology project/program director for several technical projects and products. He prioritizes key challenges, advances and facilitates technology development, and coordinates and arranges multi-functional, cross-organizational, and cross-country activities. He has previously been Sr Manager Head Advanced Wafer Engineering and Head Advanced Technology at HGST. He also has prior experience with ReadRate and TDK. He holds a BS, MS, and PhD in Applied Physics from Waseda University (Japan) and an MBA from San Jose State University.

Leah Schoeb is Technical Account Manager/Architect at Turbonomic, a developer of a hybrid cloud management system. She provides technical leadership for customers’ major initiatives and reports on customer needs for future products. She was previously Acting Director Business Development and Solutions Reference Architecture team at Intel, where she led a team of segment managers and architects managing cross functional teams for flash and NVMe based data solutions, and reference architectures in major cloud and enterprise solution design assignments. She has prior experience as a Sr Partner at the analyst firm Evaluator Group, where she focused on storage, virtualization, and cloud infrastructure. She has held management and engineering positions at VMware, Dell, and Sun Microsystems. She has ten publications on such subjects as optimizing Oracle, automated tiering, and solid state performance specifications, and has presented at many technical conferences including SNIA’s Storage Developer Conference, VMworld and Data Storage Innovation Conference. She currently serves as the Updates Chairperson for Flash Memory Summit. Leah has also participated and provided thought leadership for industry groups such as the Transaction Performance Council (TPC), Storage Performance Council (SPC), and Storage Networking Industry Association (SNIA). She is an elected member of the SNIA Technical Council and a co-founder of their Solid State Storage System Technical Work Group. She earned an MBA at the University of Phoenix and a BSEE at the University of Maryland College Park.

Tuesday, August 8th
9:45-10:50am
Invited Talk 2: New Computational Approach Brings Big Data to Its Knees (Data Management Track Track)
Organizer: Brian Berg, President, Berg Software Design

Chairperson: Shawn Adams, Product Marketing Manager, Micron

Paper Presenters:
New Computational Approach Brings Big Data to Its Knees
Rob Peglar, Independent Consultant, Advanced Computing and Storage

Session Description:
Persistent memory brings really fast storage (DRAM speed) to the memory bus. The result is a huge performance boost for big data and other storage-intensive applications. However, persistent memory is expensive, so systems can have only a limited amount of it. A new approach uses patented mathematical methods to reduce the size of the data. Performance tests show much higher throughput (over ten times that of current approaches), lower latency, and solid reproducibility and consistency. The approach works for many major applications, such as real-time data analysis, cognitive computing, virtual and augmented reality, and robotics and AI. Further advantages include increased scalability, media and hardware-independence, and ability to run applications without software changes.
About the Organizer/Moderator:
Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA, and Fibre Channel; and Storage Area Networks (SAN), and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer, and technical writer. He has participated in over 80 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters degree coursework at Stanford University.

Shawn Adams is a Product Marketing Manager at Micron Technology, where he focuses on client SSD and NAND marketing. A 16-year veteran of the technology industry, he has led product development, strategy, and marketing for hardware and software portfolios. He has experience in both domestic and international markets and in a broad range of virtual market segments. Before joining Micron Technology, he worked for Healthwise, DBSI, and MPC. He holds an MBA from Northwest Nazarene University and a Bachelor’s in Business Administration from Idaho State University.

Tuesday, August 8th
9:45-10:50am
Session 102-A: Data Recovery of SSDs (Data Recovery/Erasure Track Track)
Chairperson: Krishna Chander, Principal Analyst, Chander Consulting

Organizer: Chris Bross, VP Business Development, iFixit

Paper Presenters:
Improving Chip-Off Forensic Analysis for NAND Flash
Aya Fukami, Visiting Researcher, Carnegie-Mellon University

How the Emergence of 3D NAND Affects Data Recovery and Erasure Verification
Robin England, Senior Research and Development Engineer, Ontrack

SMS Recovery from Raw NAND of Erased eMMC Chip
Alexander Sheremetov, CTO, Rusolut

Handling the Flash Translation Layer (FTL) When Performing Recovery and Erasure
Jon Tanguy, Technical Marketing Engineer, Micron

Session Description:
SSDs are very reliable data storage devices. But when something goes amiss, users need to know what considerations should be taken into account to access and protect your organization’s sensitive data? How is inaccessible data recovered from SSDs? Are SSDs designed to make finding lost data easier? When should one engage a data recovery specialist? How do you ensure your sensitive data is securely erased and sanitized from an SSD at the end of its useful life? Data recovery experts, digital forensic specialists, and SSD manufacturers will discuss the technology and science behind data recovery and data sanitization from flash based storage. If you've ever experienced data loss, want to know how to effectively plan and be prepared in the event of data loss, or need to know who the experts are and what they do, this is a must-attend session!. Attendees will gain an in-depth understanding of the effort involved in restoring lost data from an SSD, and how to ensure sensitive data is protected and erased when an SSD is at the end of its useful life or needs to be repurposed for alternate uses.
About the Organizer/Moderator:
Krishna Chander is the Principal Analyst at Chander Consulting, where he focuses on storage systems marketing and analysis. He was previously a Senior Storage Analyst at iSuppli. He also has extensive experiences at IBM and Hitachi in storage systems analysis, thin film manufacturing, product development, and market positioning. He has an MS in Chemical Engineering from Lehigh University and an MBA from SUNY-Binghamton.

Chris Bross is CTO at DriveSavers, the worldwide leader in secure data recovery. Since joining DriveSavers in 1995, Bross has engineered his way around physical trauma, mechanical damage, and encryption issues to recover data on all types of failed storage devices. Today Bross manages the R&D team for solid state devices, developing new tools, technology, and techniques to overcome unique challenges and recover critical user data.

Tuesday, August 8th
9:45-10:50am
Session 102-B: Embedded Applications, Part 2 (Embedded Applications Track Track)
Chairperson: Bill Wong, Technology Editor, Electronic Design Magazine

Organizer: Tom McCormick, Chief Engineer/Technologist, Swissbit

Paper Presenters:
Efficiency & Fitness of Embedded Flash Storage
Chanson Lin, President, EmBestor Technology

PCIe/NVMe Brings Higher Performance to Embedded Applications
Nathan Huang, Field Applications Engineer, Phison Electronics

Choosing the Right Flash Technology for Embedded & Industrial Applications
C.C. Wu, VP Embedded Flash, Innodisk

Flash Memory for Extreme Environments
Matt Kay, Chief Engineer, NSWC Crane DoN

Session Description:
Embedded systems have long used flash memory to support highly diverse system features and functionality under a wide range of operating conditions. In recent years, cost pressures from consumer applications have reduced the performance characteristics of the most widely available flash memory devices and have strained their ability to meet the more stringent reliability requirements of embedded applications. Embedded flash must have special characteristics to meet industrial, mil/aero, and other applications’ needs in areas such as temperature, pressure, operating lifetime, shock, vibration, EMI, RFI, and radiation exposure.
About the Organizer/Moderator:
Bill Wong is Embedded/Systems/Software Technology Editor at Electronic Design Magazine. He writes several columns, including the popular Lab Bench, alt.embedded, and Bill’s Workbench hands-on column. He has written a dozen books and was the first Director of PC Labs at PC Magazine. He has worked in the technology industry for almost 40 years, including over 15 years with Electronic Design. He is a frequent conference participant as a speaker, chairperson, and organizer, including Embedded Systems Conference. He holds a BSEE from Georgia Tech and a Master’s in computer science from Rutgers.

Thomas McCormick is currently Chief Engineer/Technologist at Swissbit, where he leads market focused R&D for product development and full life cycle support. He has over twenty years experience designing PC and embedded computer systems, including over fifteen years focused on flash memory product research and development.. His ongoing research is focused on flash memory and next generation non-volatile memory systems for highly reliable storage in embedded applications. He has presented at Flash Memory Summit and the Non-Volatile Memory Workshop, and has published an article on embedded flash in EE Times. He holds a PhD in Computer Engineering from Northeastern University, an MBA and an MS in Computing Engineering from the University of Massachusetts at Lowell, and an MSME and BSME (summa cum laude) from Drexel University.

Tuesday, August 8th
9:45-10:50am
Session U-2: Annual Update on Enterprise Flash Storage (Enterprise Storage Track Track)
Organizer: Leah Schoeb, Technology Evangelist/Architect, Rubrik

Chairperson: Nathan Brookwood, Research Fellow, Insight 64

Paper Presenters:
Session Description:
Enterprise flash storage continues to advance from being a faster plug-in replacement for disk drives to being a storage layer on its own. The original SSD conception obviously allowed storage designers to use the mature hardware and software ecosystem available for HDDs, adding only the Flash Translation Layer to make the necessary adjustments. However, this approach still left SSDs with all the disadvantages of disk storage including its complexity and low speed. NVMe has now brought a standardized high-speed parallel interface to solid-state storage, allowing it to act as a high performance tier in all-flash arrays, and now allowing it to be readily networked through the new NVMe Over Fabrics (NVMe-oF) standard. The world of NVMe-oF expanded rapidly this year from ultra-low latency JBODs to high-performance, low latency arrays with a full set of data services. Even more improvement is on the way, as we begin to treat solid-state storage as memory rather than as a peculiar form of disk drive. This advance will bring great change as in-memory databases become both truly all in memory and as persistent as traditional DBMSes. Low latency RDMA networks, which are also used by NVMe-oF, will allow an application to use memory semantics to write into another system’s non-volatile memory address space. This session will examine the development of these technologies into products enterprises can deploy, and the applications such products can best address. We’ll also look into our murky crystal ball a little and predict what users can expect to see over the next 2-3 years.
About the Organizer/Moderator:
Leah Schoeb is Technical Account Manager/Architect at Turbonomic, a developer of a hybrid cloud management system. She provides technical leadership for customers’ major initiatives and reports on customer needs for future products. She was previously Acting Director Business Development and Solutions Reference Architecture team at Intel, where she led a team of segment managers and architects managing cross functional teams for flash and NVMe based data solutions, and reference architectures in major cloud and enterprise solution design assignments. She has prior experience as a Sr Partner at the analyst firm Evaluator Group, where she focused on storage, virtualization, and cloud infrastructure. She has held management and engineering positions at VMware, Dell, and Sun Microsystems. She has ten publications on such subjects as optimizing Oracle, automated tiering, and solid state performance specifications, and has presented at many technical conferences including SNIA’s Storage Developer Conference, VMworld and Data Storage Innovation Conference. She currently serves as the Updates Chairperson for Flash Memory Summit. Leah has also participated and provided thought leadership for industry groups such as the Transaction Performance Council (TPC), Storage Performance Council (SPC), and Storage Networking Industry Association (SNIA). She is an elected member of the SNIA Technical Council and a co-founder of their Solid State Storage System Technical Work Group. She earned an MBA at the University of Phoenix and a BSEE at the University of Maryland College Park.

Coming soon..

Tuesday, August 8th
3:40-4:45pm
Invited Talk 3: Managing NVMe over Fabric with Intel Rack Scale Design (NVMe-oF Track Track)
Chairperson: Xinde Hu, Principal Engineer, Western Digital

Organizer: Brian Berg, President, Berg Software Design

Paper Presenters:
Managing NVMe over Fabric with Intel Rack Scale Design
Sujoy Sen, ,

Session Description:
NVMe over Fabrics (NVMe-oF) is a compelling networking technology that allows NVMe to be deployed efficiently and at scale in the data center. Intel® Rack Scale Design is a logical architecture that disaggregates compute, storage, and network resources, and introduces the ability to more efficiently pool and utilize them. It also delivers standardized management and efficient utilization of data center resources (compute, storage, and networking). Management is handled via DMTF’s Redfish (which manages hardware components in a data center) and SNIA’s Swordfish (which manages storage services). The combination can deliver end-to-end management of NVMe-oF deployments
About the Organizer/Moderator:
Xinde Hu is currently Principal Engineer at Western Digital. His responsibility includes creating, designing, and evaluating innovative system architecture concepts and implementations for the next generations of non-volatile memory based storage systems. Before joining Western Digital, Dr. Hu worked for STEC and STMicroelectronics as a system architect. Dr. Hu has authored more than a dozen technical papers on coding/signal processing for data storage systems and has 40+ patent applications pending. He is currently Vice Chairman of the IEEE Data Storage Technical Committee (DSTC). He received his PhD in Electrical and Computer Engineering from Carnegie Mellon University.

Shawn Adams is a Product Marketing Manager at Micron Technology, where he focuses on client SSD and NAND marketing. A 16-year veteran of the technology industry, he has led product development, strategy, and marketing for hardware and software portfolios. He has experience in both domestic and international markets and in a broad range of virtual market segments. Before joining Micron Technology, he worked for Healthwise, DBSI, and MPC. He holds an MBA from Northwest Nazarene University and a Bachelor’s in Business Administration from Idaho State University.

Tuesday, August 8th
3:40-4:45pm
Session 103-A: How Do We Know We Have a Secure Flash System? (Security Track Track)
Organizer + Chairperson: Mike McKean, Director, Encore Semi

Paper Presenters:
Trusted Computing Group Update: Open Source Support for Self-Encrypting Drives
Michael Romeo, Representative, TCG Storage Workgroup

Using Blockchain Technology in SSD Controllers
Hiroshi Watanabe, Professor, National Chiao Tung University

Silicon Level Flash Security
Bob Doud, Senior Director of Marketing, Mellanox

Security in Flash Systems from the NVMe Perspective
Radjendirane Codandaramane, Manager Applications, Microsemi

Session Description:
This session will explore issues and challenges in securing data on flash memory devices and systems. It will pose related issues and opportunities and will discuss how technologies and market trends are impacting deployment of such systems in large government and private organizations. Topics covered will include self-encrypting storage, standards, secure erasure and elimination, encryption, trusted storage, embedded and industrial computing applications, and security for flash drives, SSDs, and industrial devices.
About the Organizer/Moderator:
Mike has 30 years of experience in the design, marketing, business development and application of semiconductors and systems. Mike is currently driving business development and firmware engineering for Encore Semi, Inc., a design services firm focused on ASIC and FW/SW developments. Prior to Encore Semi, Mike served as General Manager for multiple companies in the data storage space including Synapse Design and STMicroelectronics. He was also part of FHOOSH, a cyber security startup, as VP Product Solutions, which received funding in late 2016. Before moving to Colorado in 2005, Mike served in a variety of business development and customer management roles at Agere Systems, both in North American and in Asia. The earlier years of Mike's career were with Motorola Semiconductor in Austin, Texas, Phoenix, Arizona and Japan where he was the Director of Sales and Marketing for the Distribution and Components businesses. While in Japan Mike led the spin-off of ON Semiconductor from Motorola as their Country Manager before joining Lucent to help with the spin-off Agere Systems.

Tuesday, August 8th
3:40-4:45pm
Session 103-B: Know What the Enterprise Flash Customer Wants and Needs (Business/Marketing Track Track)
Organizer + Chairperson: Jay Kramer, President, Network Storage Advisors

Panel Members:
Panelist: Andrew Fenselau, VP Marketing, Elastifile

Panelist: Matt Kixmoeller, Vice President Products, Pure Storage

Panelist: Marc Staimer, President, Dragon Slayer Consulting

Session Description:
All flash arrays are the fastest growing segment of the enterprise storage industry. Tech Target will present market research data spotlighting progress toward the all-flash data center and how long it will take to achieve. An expert panel will address killer applications for all-flash arrays today and into the near future.
About the Organizer/Moderator:
Jay Kramer is a world recognized technology consultant specializing in training and delivering marketing services for the network storage industry. He has personally trained over 2000 professionals on storage networking, and he currently works with leading and emerging storage product companies worldwide. Jay has been VP Worldwide Marketing and Product Management for many storage companies including Sepaton (acquired by HDS), Astute Networks, iStor Networks, Infinity I/O, Maxtor, and Creative Design Solutions. He also has long experience in marketing and strategic planning at Unisys. An industry leader, he has served on the Board of Directors of the Fibre Channel Industry Association (FCIA) and was one of the Founders of the Flash Memory Summit. Jay has chaired SNIA committees and was a driving force in launching the first open systems SAN Certification Program, thus creating a career path for storage professionals. Jay has also been a featured speaker at industry conferences and has published articles and white papers on network storage, cloud storage, storage virtualization, data protection, and software defined storage. He is a graduate of Syracuse University’s Whitman School of Management with dual degrees in Marketing and Finance

Coming soon..

Coming soon..

Tuesday, August 8th
3:40-4:45pm
Session U-3: Annual Update on Flash Controllers (Controllers Track Track)
Chairperson: David McIntyre, Principal Consultant, DS McIntyre Consulting

Organizer: Leah Schoeb, Technology Evangelist/Architect, Rubrik

Paper Presenters:
Session Description:
The development of high-speed, well-designed, and low-cost controllers has been a key factor leading to wider use of flash memory. Controllers must account for flash’s special features, as well as providing error correction, wear management, and high availability. The controller market has also been in a state of flux with new entrants constantly appearing while old stalwarts are acquired or lose their technical edge. The big news in the last year has been the rapid emergence of NVMe controllers, which appear ready to dominate the market. There has also been interest in higher-speed and lower-latency controllers and in ones that can be managed more precisely (via I/O determinism) and networked efficiently.
About the Organizer/Moderator:
David McIntyre is Principal Consultant at DS McIntyre Consulting, where he focuses on machine learning solutions, as well as programmable logic and GPU applications in the data center. He previously led the compute and storage business for Altera (now part of Intel). He has also held leadership positions at IBM, Fairchild, and startup Transmeta where he marketed and led the development of comprehensive product portfolios for high performance computing, enterprise networking and enterprise storage. He holds BSEE, MSEE, and MBA degrees. David is a regular speaker at networking and data center infrastructure conferences, including Flash Memory Summit.

Leah Schoeb is Technical Account Manager/Architect at Turbonomic, a developer of a hybrid cloud management system. She provides technical leadership for customers’ major initiatives and reports on customer needs for future products. She was previously Acting Director Business Development and Solutions Reference Architecture team at Intel, where she led a team of segment managers and architects managing cross functional teams for flash and NVMe based data solutions, and reference architectures in major cloud and enterprise solution design assignments. She has prior experience as a Sr Partner at the analyst firm Evaluator Group, where she focused on storage, virtualization, and cloud infrastructure. She has held management and engineering positions at VMware, Dell, and Sun Microsystems. She has ten publications on such subjects as optimizing Oracle, automated tiering, and solid state performance specifications, and has presented at many technical conferences including SNIA’s Storage Developer Conference, VMworld and Data Storage Innovation Conference. She currently serves as the Updates Chairperson for Flash Memory Summit. Leah has also participated and provided thought leadership for industry groups such as the Transaction Performance Council (TPC), Storage Performance Council (SPC), and Storage Networking Industry Association (SNIA). She is an elected member of the SNIA Technical Council and a co-founder of their Solid State Storage System Technical Work Group. She earned an MBA at the University of Phoenix and a BSEE at the University of Maryland College Park.

Tuesday, August 8th
4:55-6:00pm
Invited Talk 4: Persistent Memory is Not What You Think! (Persistent Memory Track Track)
Chairperson: Xinde Hu, Principal Engineer, Western Digital

Organizer: Brian Berg, President, Berg Software Design

Paper Presenters:
Persistent Memory is Not What You Think!
Jim Handy, Director/Chief Analyst, Objective Analysis

Session Description:
Persistent memory (nonvolatile memory that operates at DRAM speeds) is now readily available in forms such as 3D XPoint from Intel. What will it offer to storage designers? Will it revolutionize storage as Intel and Micron claimed when they introduced 3D XPoint in 2015? Or will its effects be somewhat less. Obviously, actual availability and pricing will play a key role. And, of course, the effects will be substantial only in applications that spend a lot of their time waiting for storage transfers. Furthermore, the value of the increased speed must be sufficient to compensate for the almost total lack of system software support for storage at memory speeds.
About the Organizer/Moderator:
Xinde Hu is currently Principal Engineer at Western Digital. His responsibility includes creating, designing, and evaluating innovative system architecture concepts and implementations for the next generations of non-volatile memory based storage systems. Before joining Western Digital, Dr. Hu worked for STEC and STMicroelectronics as a system architect. Dr. Hu has authored more than a dozen technical papers on coding/signal processing for data storage systems and has 40+ patent applications pending. He is currently Vice Chairman of the IEEE Data Storage Technical Committee (DSTC). He received his PhD in Electrical and Computer Engineering from Carnegie Mellon University.

Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA, and Fibre Channel; and Storage Area Networks (SAN), and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer, and technical writer. He has participated in over 80 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters degree coursework at Stanford University.

Tuesday, August 8th
4:55-6:00pm
Session 104-A: RansomWare: What It Is and What Role Flash Plays in It (Security Track Track)
Co-Organizer: Rich Fetik, CEO, Data Confidential

Organizer + Chairperson: Mike McKean, Director, Encore Semi

Panel Members:
Panelist: Bob Thibadeau, Chairman/CEO, Drive Trust Alliance

Panelist: Suhail Zain, Director Systems Engineering, Cypress Semiconductor

Panelist: Devesh Ahuja, Vice-President, Cipher Solutions

Panelist: Monty Forehand, Security Technologist/Product Security Officer, Seagate

Panelist: Hiroshi Watanabe, Professor, National Chiao Tung University

Session Description:
Ransomware is malicious software that threatens to publish the victim’s data or block access to it unless the victim pays a ransom. The problem of ransomware began around 2012 and has grown rapidly (and internationally). The sophistication of the attacks has grown rapidly, and the difficulty of stopping them or tracing what happens to payments has also increased greatly. The largest threat appears to be to medium-sized installations that depend on their data, lack much sophistication in methods or personnel, and are capable of paying large ransoms. Examples include school districts, hospitals, professional firms, and small/medium-size businesses. As flash memory becomes more widespread, it will surely become still another method for attack. As a new technology, it is often left unprotected and its vulnerabilities are neither well-known nor well-understood. As more data migrates to flash, the problem will only get worse. Flash manufacturers at all levels will need to understand this threat and what they can do to combat it.
About the Organizer/Moderator:
Coming soon..

Mike has 30 years of experience in the design, marketing, business development and application of semiconductors and systems. Mike is currently driving business development and firmware engineering for Encore Semi, Inc., a design services firm focused on ASIC and FW/SW developments. Prior to Encore Semi, Mike served as General Manager for multiple companies in the data storage space including Synapse Design and STMicroelectronics. He was also part of FHOOSH, a cyber security startup, as VP Product Solutions, which received funding in late 2016. Before moving to Colorado in 2005, Mike served in a variety of business development and customer management roles at Agere Systems, both in North American and in Asia. The earlier years of Mike's career were with Motorola Semiconductor in Austin, Texas, Phoenix, Arizona and Japan where he was the Director of Sales and Marketing for the Distribution and Components businesses. While in Japan Mike led the spin-off of ON Semiconductor from Motorola as their Country Manager before joining Lucent to help with the spin-off Agere Systems.

Tuesday, August 8th
4:55-6:00pm
Session 104-B: What Do the 800-Pound Gorilla Customers Want in Flash Storage? (Business/Marketing Track Track)
Organizer: Jay Kramer, President, Network Storage Advisors

Chairperson: Jillian Coffin, VP/Publisher Storage Virtualization and Cloud, TechTarget

Panel Members:
Panelist: Sunder Parameswaran, Director Product Management, VMware

Panelist: Lior Gal, CEO, Excelero

Panelist: Dominic Preuss, Director Product Management Cloud Platform, Google

Panelist: Dave Raffo, Editorial Director, TechTarget

Panelist: Eric Stouffer, VP Distributed Storage BU, IBM

Session Description:
Hyperscale Cloud Service Providers (CSPs) are growing and On-Premise data centers are shrinking. What are the storage requirements of the cloud providers? Are their needs different? What are the mega-cloud providers buying and why? Who are the winners and who are the losers? What do vendors designing products and IT organizations buying products need to know as we look at the cloud storage marketplace.
About the Organizer/Moderator:
Jay Kramer is a world recognized technology consultant specializing in training and delivering marketing services for the network storage industry. He has personally trained over 2000 professionals on storage networking, and he currently works with leading and emerging storage product companies worldwide. Jay has been VP Worldwide Marketing and Product Management for many storage companies including Sepaton (acquired by HDS), Astute Networks, iStor Networks, Infinity I/O, Maxtor, and Creative Design Solutions. He also has long experience in marketing and strategic planning at Unisys. An industry leader, he has served on the Board of Directors of the Fibre Channel Industry Association (FCIA) and was one of the Founders of the Flash Memory Summit. Jay has chaired SNIA committees and was a driving force in launching the first open systems SAN Certification Program, thus creating a career path for storage professionals. Jay has also been a featured speaker at industry conferences and has published articles and white papers on network storage, cloud storage, storage virtualization, data protection, and software defined storage. He is a graduate of Syracuse University’s Whitman School of Management with dual degrees in Marketing and Finance.

Jillian Coffin is Group Publisher for the Storage, Virtualization, and Cloud Media Groups at TechTarget. She is responsible for editorial, audience development, marketing, product management, and sales execution for such sites as SearchStorage.com, SearchCloudComputing.com, SearchVMware.com, SearchServerVirtualization.com, SearchDataBackup.com, and SearchDisasterRecovery.com. She guides TechTarget’s efforts to keep its finger on the pulse of what’s happening in these target markets and what the IT Community needs to know about innovative technologies and solutions. She has over 15 years of experience working in technical publishing. She earned a BA from the University of Massachusetts at Amherst.

Tuesday, August 8th
4:55-6:00pm
Session U-4: Annual Update on New Technologies (New Memory Technologies Track Track)
Organizer: Leah Schoeb, Technology Evangelist/Architect, Rubrik

Chairperson: Satoru Araki, Senior Director, Program/Product Management, Spin Transfer Technologies

Paper Presenters:
Session Description:
Emerging memories have been forever banished to tiny niche markets subject to their impossibly insurmountable DRAM and NAND overlords… or have they? Each year, Flash Memory Summit offers predictions about how new memory technologies are near the horizon – and why they will disrupt the memory business and system architectures. Will emerging memories perpetually be 3 years to production or is the dawning of something new finally here? This session will offer a practical walkthrough of what we’ve learned about emerging memories over the past decade, the barriers that threaten their emergence, and what technical, manufacturing, ecosystem, and market conditions need to exist for them to be truly successful.
About the Organizer/Moderator:
Leah Schoeb is Technical Account Manager/Architect at Turbonomic, a developer of a hybrid cloud management system. She provides technical leadership for customers’ major initiatives and reports on customer needs for future products. She was previously Acting Director Business Development and Solutions Reference Architecture team at Intel, where she led a team of segment managers and architects managing cross functional teams for flash and NVMe based data solutions, and reference architectures in major cloud and enterprise solution design assignments. She has prior experience as a Sr Partner at the analyst firm Evaluator Group, where she focused on storage, virtualization, and cloud infrastructure. She has held management and engineering positions at VMware, Dell, and Sun Microsystems. She has ten publications on such subjects as optimizing Oracle, automated tiering, and solid state performance specifications, and has presented at many technical conferences including SNIA’s Storage Developer Conference, VMworld and Data Storage Innovation Conference. She currently serves as the Updates Chairperson for Flash Memory Summit. Leah has also participated and provided thought leadership for industry groups such as the Transaction Performance Council (TPC), Storage Performance Council (SPC), and Storage Networking Industry Association (SNIA). She is an elected member of the SNIA Technical Council and a co-founder of their Solid State Storage System Technical Work Group. She earned an MBA at the University of Phoenix and a BSEE at the University of Maryland College Park.

A technology management executive with over 15 years experience, Dr. Araki is currently Director Head Program Management and Platform Development at HGST, a Western Digital company. He serves as technology project/program director for several technical projects and products. He prioritizes key challenges, advances and facilitates technology development, and coordinates and arranges multi-functional, cross-organizational, and cross-country activities. He has previously been Sr Manager Head Advanced Wafer Engineering and Head Advanced Technology at HGST. He also has prior experience with ReadRate and TDK. He holds a BS, MS, and PhD in Applied Physics from Waseda University (Japan) and an MBA from San Jose State University.

Wednesday, August 9th
Wednesday, August 9th
8:30-9:35am
Invited Talk 5: Persistent Memory’s Initial App Will Be Real-Time Analytics (Persistent Memory Track Track)
Chairperson: David McIntyre, Principal Consultant, DS McIntyre Consulting

Organizer: Brian Berg, President, Berg Software Design

Paper Presenters:
Persistent Memory’s Initial Major Application Will Be Real-Time Analytics
Andy Walls, Fellow/CTO/Chief Architect, IBM

Session Description:
Products based on fast persistent memory such as 3D XPoint are now available, two years after Intel and Micron announced the development of “a new class of non-volatile memory, creating the first new memory category in more than 25 years.” What applications can take full advantage of their speed even at the initial premium price (about 5 times the cost of flash)? A likely candidate is data analytics. After all, the more data enterprises can crunch, the more revenue they can generate or the most costs they can avoid or reduce. The idea is to keep extending the “just-in-time” idea to cover both costs and revenue opportunities. ROI is readily quantifiable and easy to determine through controlled experiments. Furthermore, data centers can reduce the premium significantly by employing multi-tiered memory. A system that combines less expensive flash with persistent memory can approach the throughput and latency of an all-persistent memory implementation at much lower cost.
About the Organizer/Moderator:
David McIntyre is the Principal Consultant at DS McIntyre Consulting LLC, where he supports his clients who invest in compute, storage and networking solutions for data center applications. He previously led the compute and storage FPGA business for Altera (now part of Intel) and has held leadership positions at IBM, Fairchild, and processor startup Transmeta. David is a regular speaker at bay area networking and data center infrastructure conferences, and a long time contributor to the Flash Memory Summit.

Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA, and Fibre Channel; and Storage Area Networks (SAN), and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer, and technical writer. He has participated in over 80 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters degree coursework at Stanford University.

Wednesday, August 9th
8:30-9:35am
Session 201-A: Market Research Panel (Market Research Track Track)
Chairperson: John Rotchford, Managing Director, SASI

Panel Members:
Panelist: Jim Handy, Director/Chief Analyst, Objective Analysis

Panelist: Sean Yang, Research Director, Trendforce.com

Panelist: Camberley Bates, Managing Director/Analyst, Evaluator Group

Panelist: Jeff Janukowicz, VP, IDC

Panelist: Chris DePuy, Research Analyst/Co-Founder, 650 Group

Session Description:
The flash memory market has recently seen explosive growth and rising demand, attracting many startups and creating exciting acquisitions and IPOs. On the technology front, NAND flash products are achieving lower cost through higher densities and by cascading from SLC to MLC to TLC to 3-D. New products are being targeted for the enterprise ranging from embedded flash on servers to improve their I/O performance a thousand-fold to networked SSDs targeting lower costs. A new generation of smart controllers significantly increases performance using hierarchical flash caching, improves high availability, and enhances endurance through deploying ECC, wear-leveling, over- provisioning, and garbage collection techniques together with auto-configuration and workload aware auto-tiering placement. Such controllers help make SSDs suitable for mission critical enterprise applications. Attend this key session on the state of the flash Industry. It will cover market forecasts, shares, technology progress, competition, go-to-market pricing structures, and possible mergers and acquisitions. Ask questions of analysts to crystallize your understanding of markets and potentially competitive products. Areas of interest include: Forecast of flash growth in server and storage markets Market segments where flash will displace other technologies New configurations such as all-flash arrays and flash in DIMM (NVDIMM) Price trends and their impact on markets New interfaces such as NVMe and NVMe-oF Effects of software-defined storage and hyperconvergence Whether future computer systems will incorporate flash directly at all levels The role storage will play in the transition from on-premise data centers to clouds The status of emerging technologies such as MRAM, RRAM, and 3D XPoint™ Acquisition candidates
About the Organizer/Moderator:
John Rotchford is Managing Director and Founder at SASI, a boutique mergers and acquisitions (M&A) advisory firm focused on serving investors and entrepreneurs in the IT industry. SASI represents leading venture backed private companies that are exploring strategic M&A options. John is a 20-year technology industry veteran with a unique blend of investment banking, strategy consulting, corporate development, and start-up experience. He was previously a Vice-President at Silicon Valley Bank, where he co-managed the information technology practice, and Director Corporate Development at Iomega, where he was responsible for strategic planning, M&A, and new investment activities. He earned a BS in Accounting and Finance from Babson College.

Wednesday, August 9th
8:30 AM-9:35 AM
Session 201-B: Annual Update on Flash Arrays (Enterprise Storage Track Track)
Organizer + Chairperson: KRS Murthy, CEO, I Cubed

Paper Presenters:
Testing All Flash Arrays with High-Speed Interconnects
Sarvesh S Patel, Test Architect/Senior Technical Lead, IBM India

Reigning in Power & Unleashing Performance in Flash Arrays
Phil Northcott, Principal Engineer, Network Intelligence

Making Accurate Assessments of All-Flash Arrays under Realistic Workloads
Stephen Daniel, Director of Product Management, Nimble Storage

NVMeoF Enterprise All-Flash Arrays Offer Top Performance
Weafon Tsao, VP, AccelStor

Session Description:
Flash arrays contain multiple SSDs, replacing traditional hard drives. They may be either all-flash with no hard drives at all or hybrids with both types of drives. They are currently very popular in data centers as a packaged solution that provides fast access at a reasonable price. They can do everything a disk array can do (and much faster), although SSDs usually have lower capacities than hard drives.
About the Organizer/Moderator:
KRS Murthy is an experienced venture capitalist, serial entrepreneur and corporate strategist. He is currently focused on mergers and acquisitions, corporate governance, and competitive strategy. He has developed national level technology and industry strategies in multiple key areas. He has led many companies at many different stages and has grown companies to sales of over $500 million. He is a popular speaker at conferences around the world and a leader in many technical societies, including IEEE Nanotechnology Council, IEEE Engineering Management Society, IEEE Computer Society, Silicon Valley Engineering Council, and IEEE Standards Board. Murthy also has experience as a USA Country Manager for AT&T and AT&T Bell Labs and as a professor of computer engineering at California State University, Pomona & Fullerton. He has received a Distinguished Service Award from the IEEE Engineering Management Society and a Distinguished Achievement Award from the President of India.

Wednesday, August 9th
8:30-9:35am
Session 201-C: Testing Issues (Testing/Performance Track Track)
Chairperson: Marilyn Kushnick, R & D Engineer, Advantest

Paper Presenters:
Scalable Platform for Optimal SSD Test
Ben Rogel Favila, R&D Director, Advantest

Using Simulations to Generate Relevant PCB Constraints for Flash Systems
Alex Tain, Senior Staff IC Package and SI/PI Engineer, Seagate

Preparing SSDs for Qualification Testing
Vishal Devadiya, R&D Application Engineer, Advantest

Session Description:
Testing is essential to ensuring that flash devices will meet system requirements. It may involve modeling as well as testing and must include a wide variety of effects. It also depends on the type of flash devices being tested, which may range from cards through entire arrays. It must reflect real-world conditions and include the effects of both hardware and software.
About the Organizer/Moderator:
Coming soon..

Wednesday, August 9th
9:45-10:50am
Invited Talk 6: Solving Latency Challenges with NVMe SSDs at Scale (NVMe/PCIe Storage Track)
Organizer: Brian Berg, President, Berg Software Design

Chairperson: David McIntyre, Principal Consultant, DS McIntyre Consulting

Paper Presenters:
Solving Latency Challenges with NVMe SSDs at Scale
Chris Petersen, ,

Session Description:
As storage requirements keep rising in the era of big data and clouds, SSDs need to be shared across multiple applications or hosts without impacting read QoS. The sharing of SSDs allows for higher utilization and lower overall storage costs, as well as simplifying both scaling and expansion. However, sharing can cause latency issues, particularly in cases where one application hogs an SSD (behaving like a classic “noisy neighbor”). In hyperscale environments, it is critical to provide all applications with the right ratio of compute to flash capacity while maintaining tight read latency distributions across a wide range of applications. Achieving this goal requires that host applications be able to work collaboratively with large numbers of NVMe SSDs. The solution is to provide I/O determinism in which the host controls reads and writes in detail rather than leaving much of the operations for the device to handle transparently. By subdividing SSDs into smaller regions and renegotiating the transfer process (or contract) between the host and device, read latency can be bounded and noise caused by sharing SSDs avoided. New NVMe features allow for greater I/O determinism, thus contributing toward cheaper, more efficient storage for clouds, hyperconverged systems, and mega-websites.
About the Organizer/Moderator:
Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA, and Fibre Channel; and Storage Area Networks (SAN), and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer, and technical writer. He has participated in over 80 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters degree coursework at Stanford University.

David McIntyre is the Principal Consultant at DS McIntyre Consulting LLC, where he supports his clients who invest in compute, storage and networking solutions for data center applications. He previously led the compute and storage FPGA business for Altera (now part of Intel) and has held leadership positions at IBM, Fairchild, and processor startup Transmeta. David is a regular speaker at bay area networking and data center infrastructure conferences, and a long time contributor to the Flash Memory Summit.

Wednesday, August 9th
9:45-10:50am
Session 202-A: NVMe Market Research (Market Research Track Track)
Organizer + Chairperson: Jean Bozman, VP/Principal Analyst, Hurwitz & Associates

Panel Members:
Panelist: Uma Parepalli, Sr Manager, Western Digital

Panelist: Eric Burgener, Research Director Storage, IDC

Panelist: J Metz, Office Of The CTO/Board Member, Cisco Systems

Panelist: Rohit Gupta, Segment Manager, Enterprise Storage Solutions, Western Digital

Speaker: Mike Heumann, Managing Partner, G2M Communications

Panelist: Andy Walls, Fellow/CTO/Chief Architect, IBM

Panelist: Rob Callaghan, Sr. Manager, Enterprise & Cloud Solutions, Western Digital

Session Description:
NVMe has emerged rapidly as a major market since its introduction just a few years ago. It is intended as a standard package to enable designers to handle storage over the popular and widely supported PCIe bus. The largest part of the market is for simple adapters that connect a computer to a storage device. The advantage over the disk interfaces is higher speed. More recent extension of NVMe have opened new markets for switches, software, management, and system-level storage devices. Markets also include all-flash arrays, storage appliances, NVMe over Fabric (NVMe-oF) adapters, storage software, and intellectual property. NVMe-oF is the extension of NVMe to handle multiple computers, including clusters, multiprocessors, and distributed systems. As of 2016, over 70 companies had announced products based on NVMe, and over 100 companies had joined the NVM Express Organization, the governing body for NVMe. High-level members (known as promoters) include such important companies as Cisco, Dell EMC, Facebook, Intel, Micron, Microsemi, Microsoft, NetApp, Oracle, Samsung, Seagate, Toshiba, and Western Digital.
About the Organizer/Moderator:
Jean S. Bozman is currently Vice-President and Principal Analyst at Hurwitz and Associates, where she covers data center infrastructure, server and storage technology, software-defined storage, and software-defined infrastructure (SDI). She also serves as Program Chairperson for the Software-Defined Infrastructure Summit. Before joining Hurwitz and Associates, she was Senior Product Marketing Manager at SanDisk, where she drove the discussion of enterprise workloads that leverage SSDs. A well-respected IT professional with over 20 years experience covering the worldwide markets for operating environments, servers and the workloads that run on servers, she was previously a Research VP at IDC. While at IDC, she focused on the worldwide market for server operating systems. She analyzed the worldwide server market and managed the Clustering and Availability Software (CLAS) market research. Ms. Bozman has been widely quoted in business publications, including BusinessWeek and Investor’s Business Daily; in daily newspapers, including the San Jose Mercury News and Los Angeles Times; and in online publications, such as CNET (news.com), Bloomberg, and Reuters. Ms. Bozman holds a B.S. from the State University of New York (SUNY) at Stony Brook and a master's degree from Stanford University

Wednesday, August 9th
9:45-10:50am
Session 202-B: The Performance Story: An Independent Evaluation of Flash Storage (Testing/Performance Track Track)
Organizer + Speaker: Dennis Martin, President, Demartek

Chairperson: John Geldman, Director, SSD Industry Standards, Toshiba

Paper Presenters:
The Performance Story: An Independent Evaluation of Flash Storage
Dennis Martin, President, Demartek

Session Description:
Everyone (designers, marketers, salespeople, executives, and customers) wants to know how flash storage really performs. And they want to know it from an independent source using real-world applications. Demartek will report on vendor-neutral performance tests run on database and virtualization workloads typical of today’s data centers. The tests cover systems from several manufacturers, using a variety of form factors and interfaces and including both block and file protocols. Attendees will get good estimates of what to expect in practice, since the tests are independent and focus on current applications and environments. Demartek will also discuss recent advances such as NVMe over Fabrics (NVMe-oF) and high-speed interfaces such as 100 GbE and 32Gb Fibre Channel. Vendors will learn how their products shape up and where they should put their efforts.
About the Organizer/Moderator:
Dennis Martin is the founder and President of Demartek, an analyst firm focused on validation and performance testing of data center products. Demartek has its own fully equipped, modern test lab with the servers, networking and storage gear found in today’s data centers. Its widely recognized reports cover products and technologies from both well-known vendors and startups, including Broadcom, Cavium, Cisco, Dell EMC, HPE, IBM, Intel, Microsemi, NetApp, Nimbus Data, Pure Storage, Samsung, Seagate, Toshiba, Western Digital and others. Demartek also produces popular industry references, including its “Storage Interface Comparison” covering every interface used by storage systems and its “SSD Deployment Guide” that explains everything you need to know to deploy flash-based storage systems in the datacenter. Dennis’ commentary “Horses, Buggies and SSDs” is a must-read for getting the long-term view of flash and other non-volatile storage technologies. Dennis is frequently quoted in the press (in such outlets as TechTarget, Market Watch, and Street Insider) on such topics as best practices for deploying SSD technologies and analyzing performance claims for all-flash arrays. A 37-year veteran of the technology industry, Dennis was previously a Senior Analyst with Evaluator Group and a marketing and engineering executive with StorageTek. He has been a Microsoft storage MVP since 2005.

John Geldman is Director SSD Industry Standards at Toshiba. He focuses on standards for cloud storage, HDD and SSD storage devices, data security, and persistent (storage class) memory. His previous standards committee engagements include INCITS T10 and T13, NVMe, PCI-SIG, SATA-IO, TCG, SFF, SNIA, OSF, OCP, and JEDEC. He is well-known as a storage interface leader adept at guiding standards organizations and architecting groundbreaking technical developments. His specialties include SSD architecture, IP development, storage security, and storage card products. He was previously Director Industry Standards at Micron, where he led the company’s participation in such standards bodies as T10, T13, SATA, IEEE 1667, USB, CompactFlash, and the SD Association. He has also worked for Brecis Communications, Basis Communications, and Cirrus Logic. He holds 9 patents and has been recognized for his standards work by the SD Association and INCITS. A frequent blogger and conference contributor, he has been a speaker, organizer, and chairperson at Flash Memory Summit, as well as being a member of the Conference Advisory Board. He holds an MSCS from Santa Clara University and a BSECE from Clarkson University.

Wednesday, August 9th
9:45-10:50am
Session 202-C: Mobile Applications (Consumer/Mobile Applications Track Track)
Organizer: Belinda Lucero, Events Manager, SD Association

Co-Organizer: Xiaobing Lee, Principal Engineer, Huawei

Organizer: Andy Marken, President, Marken Communications

Paper Presenters:
The SD-PCIe card – New Innovations in SD Cards Lead the Way to Mobile Everything
Yosi Pinto, Chairman, SD Association

Implementing Mobile Storage with 3D NAND
Robert Hsieh, Product Marketing Director, Silicon Motion

Determining Which PCIe BGA SSD Architecture is Right For Your Application
Mason Chen, ,

Session Description:
Mobile platforms are turning up everywhere today. Everyone wants continuous connectivity at low cost in highly portable forms. Flash memory affects platform designs, performance, and power consumption. What is on the horizon for mobile applications and how will future designs be defined? This session will provide insight into data transfers, use of technologies derived from enterprise storage, and new memory standards.
About the Organizer/Moderator:
Coming soon..

Coming soon..

Coming soon..

Wednesday, August 9th
9:45-10:50am
Session 202-D: Open-Source Software and Flash Memory (Software Track Track)
Chairperson: Chris DePuy, Research Analyst/Co-Founder, 650 Group

Organizer: Brian Berg, President, Berg Software Design

Paper Presenters:
Experimental Results of Implementing NVMe on Open Channel SSD
Yong Ho Song, ,

Increasing Ceph Performance Cost-Effectively with New Non-Volatile Technologies
Brien Porter, Sr Program Manager, Big Data Technologies, Intel

Delivering Breakthrough All-Flash Performance for Ceph
, ,

Session Description:
There is little question but that open-source software will play an ever-increasing role in future data centers. In particular, the companies that run mega-websites and clouds are able to achieve such high economies of scale that rather than pay huge licensing or maintenance charges for the software they need, they can afford to build out their own software infrastructure. They would much rather contribute to open-source projects and pay for support only when they need it. Flash plays two roles in the greater emergence of open-source software. In the first place, flash-related system software may itself be open-source. Secondly, the issue emerges of making open-source software utilize flash efficiently and take full advantage of its full availability. This latter issue applies especially to storage software such as Ceph which offers a combination of a traditional relational database with newer object-based methods. Ceph needs to provide access to flash facilities, as well as itself running efficiently to today’s flash-heavy environments.
About the Organizer/Moderator:
Coming soon..

Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA, and Fibre Channel; and Storage Area Networks (SAN), and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer, and technical writer. He has participated in over 80 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters degree coursework at Stanford University.

Wednesday, August 9th
3:20-4:25pm
Invited Talk 7: ReFlex: A System for Accessing Remote Flash Like Local Flash (Architectures Track Track)
Chairperson: Tom Griffin, Advisory Engineer, IBM

Organizer: Brian Berg, President, Berg Software Design

Paper Presenters:
ReFlex: A System for Accessing Remote Flash Like Local Flash
Ana Klimovic, Graduate Student, Stanford University

Session Description:
Remote access enables flexible scaling and high utilization of flash storage within a datacenter. However, existing systems for implementing remote flash either reduce performance significantly or are unable to isolate multiple remote clients sharing a single flash device. ReFlex is a software-based system for remote flash access that offers virtually the same performance as accessing local flash. ReFlex re-architects and closely integrates the networking and storage system software stacks to achieve low latency and high throughput with minimal resource requirements. Specifically, ReFlex can serve up to 850K IOPS per core over TCP/IP, while adding just a 21us delay over direct access to local flash. ReFlex uses a quality of service I/O scheduler to enforce tail latency (the occurrence of exceptionally long delays) and throughput service-level objectives (SLOs) for thousands of remote clients. The system allows applications to use remote flash without any effect on performance. The ReFlex source code is available at: www.github.com/stanford-mast/reflex .
About the Organizer/Moderator:
Thomas Griffin is an Advisory Engineer and the Flash Characterization Technical Lead in IBM’s Systems Group. He has worked on SSD and NAND flash device characterization for the past eight years. He holds several US patents and has co-authored technical papers. Tom earned a BSEE and BA from the University of Notre Dame.

Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA, and Fibre Channel; and Storage Area Networks (SAN), and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer, and technical writer. He has participated in over 80 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters degree coursework at Stanford University.

Wednesday, August 9th
3:20-4:25pm
Session 203-A: RRAM (New Memory Technologies Track Track)
Organizer + Chairperson: Dave Eggleston, Principal, Intuitive Cognition Consulting

Panel Members:
Panelist: Zhiqiang Wei, Chief Engineer, Panasonic Semiconductor Solutions Co., Ltd.

Panelist: Amigo Tsutsui, Senior Business Producer, Sony Semiconductor Solutions

Panelist: Hagop Nazarian, VP Engineering, Crossbar

Session Description:
RRAM (resistive RAM) development keeps progressing, with companies using a variety of approaches to pursue potential applications in high capacity storage, mid-range nonvolatile caches, and low cost embedded solutions. Come hear industry leaders offer views on the current state of RRAM technology, the target applications, and the road to commercialization.
About the Organizer/Moderator:
Dave Eggleston is VP Memory at GlobalFoundries. He has responsibility for the embedded volatile and non-volatile memory businesses, as well as related strategic direction and initiatives. He was previously Principal of Intuitive Cognition Consulting, which provides strategic consulting to memory and storage companies. Dave is the former CEO and President of Unity Semiconductor, an RRAM industry pioneer acquired by Rambus. He has held technical executive management roles at Rambus, Micron (where he built the NAND systems engineering organization and led it for 12 years), SanDisk, and AMD. He holds 15 patents in NAND flash and next-generation ReRAM memory, storage system usage, and high volume manufacturing. He has also been a Vice-President of JEDEC. He earned his MSEE from Santa Clara University and his BSEE from Duke University.

Wednesday, August 9th
3:20-4:25pm
Session 203-B: Flash Technology (New Memory Technologies Track Track)
Organizer: Jim Handy, Director/Chief Analyst, Objective Analysis

Chairperson: Alan Weckel, CEO/Founder, 650 Group

Paper Presenters:
Removing Vulnerabilities from MLC NAND Flash Programming
Saugata Ghose, Special Faculty Systems Scientist, Carnegie-Mellon University

NAND at the Speed of SCM
Peter Lee, President, Aplus Flash Technology

Hardware Acceleration of Erasure Coding for Flash Storage
Dror Goldenberg, VP Architecture, Mellanox

Session Description:
Flash is a complex technology, and there are many ways to improve its usage. Complex algorithms can readily be implemented, since compute power is always available. The main issue is the difficult one of determining whether such approaches have significant practical effects. Hardware acceleration can also help in cases where cost is not an overwhelming factor and specific levels of performance must be reached.
About the Organizer/Moderator:
Jim Handy is President of Objective Analysis, a strategic marketing and market research firm for the semiconductor industry. He has over 30 years of electronic industry experience, including 14 years as an industry analyst with Dataquest and Semico Research. A frequent presenter at trade shows, Mr. Handy has also written hundreds of articles and is frequently interviewed and quoted in the electronics trade press and other media. Mr. Handy writes the Chip Talk blog for Forbes online and contributes to two Objective Analysis blogs: The SSD Guy and The Memory Guy. He is the author of “The Cache Memory Book” and a patent holder in cache memory design. He holds a BSEE from Georgia Tech and an MBA from the University of Phoenix.

Alan Weckel is Technology Analyst/Co-Founder at 650 Group, where he is in charge of Ethernet switch research and new areas such as SDN forecasting and WAN optimization. He has written many articles for the trade and technical press, and is frequently quoted in such leading publications as Bloomberg, Businessweek, Forbes, Network World, and the Wall Street Journal. Before co-founding 650 Group, he was VP/analyst at Dell’Oro Group and had engineering and software development experience at Raytheon, General Electric Power Systems, and Cisco. He holds a BSEE and an MS in Management from Rensselaer Polytechnic Institute.

Wednesday, August 9th
3:20-4:25pm
Session 203-C: Flash in Cloud Computing (Enterprise Storage Track Track)
Organizer + Chairperson: Jathin Ullal, Infrastructure Architect, Saygo

Paper Presenters:
Building Your Castle in the Cloud for Flash Memory
Steve Knipple, Principal Consultant, Cloud Shift Advisors

Introducing DPU – Placing Intelligence in Storage
Qing Yang, Chief Scientist, Dapu Microelectronics

Developing Bargain-Priced Flash Cloud Data Centers
Rado Danilak, CEO, Tachyum

Session Description:
Storage is a crucial part of any cloud, regardless of its type or ownership. Cloud service providers have become major players in buying flash storage technology, looking for more IOPS even at higher cost to provide better performance. Providers also advertise SSDs as being available to users at extra cost Cloud providers also like the higher reliability of flash memory and its operating efficiency (space, power, and cooling requirements). However, the extra cost remains an issue, particularly in the amounts needed in cloud environments, as do the issues of wear and endurance.
About the Organizer/Moderator:
Jathin Ullal is a Global Product Line Manager at HPE, where he collaborates with customers and identifies their needs to translate them into successful products. He was previously an Infrastructure Architect at Saygo, where he was responsible for the design, deployment, and support of a hybrid cloud infrastructure covering over 80 cloud and IT offerings across legacy IT, private, public, and managed cloud. Before Saygo, he set up and led marketing and engineering teams at both venture-funded startups and large companies. He has held leadership positions at HP, Cisco, and Nortel, including being in charge of the design, deployment, and support of the networking, security, and management infrastructure for 15 SaaS applications hosted in 24 global data centers. Widely regarded as an expert in cloud computing and SaaS, he has presented at many conferences and led sessions and seminars. He holds an MSEE from the University of New Mexico.

Wednesday, August 9th
3:20-4:25pm
Session 203-D: CMO Panel: Flash Will Be Everywhere but the Customer Still Rules (Business/Marketing Track Track)
Panel Members:
Panelist: Jason Nadeau, Storage Industry Disruptor, Pure Storage

Panelist: Christine Heckart, Executive VP/Ex-CMO, Brocade

Session Description:
Marketing enterprise flash storage isn’t an easy job. The technology is complex and fast-changing, and customers are often very confused. How does one develop a clear message that responds to customer needs and offers the best return for the investment? Leading storage marketing leaders will discuss the changing dynamics of the customer journey. What role does marketing analytics play in gaining a competitive advantage? Has the marketing playbook really changed? What are the winning strategies with the shift to cloud, hyperconverged architecture, and software defined infrastructure? What magic do successful marketers have up their sleeve as they follow the golden rule of “Know Your Customer”?
About the Organizer/Moderator:
Wednesday, August 9th
4:40-5:45pm
Invited Talk 8: NOVA: A High-Performance, Hardened File System for N-V Memories (Persistent Memory Track Track)
Chairperson: Tom Griffin, Advisory Engineer, IBM

Organizer: Brian Berg, President, Berg Software Design

Paper Presenters:
NOVA: A High-Performance, Hardened File System for Non-Volatile Main Memories
Steven Swanson, Professor, UC San Diego

Session Description:
Fast non-volatile memories (NVMs) will soon usher in a new era of high-performance storage. Managing, protecting, accessing, and maintaining consistency for data stored in NVMM (non-volatile main memory) file systems raises a host of challenges that existing systems do not address. NOVA is an open-source NVMM file system that provides higher performance, better reliability, and stronger consistency than any available NVMM file system. NOVA adapts conventional log-structured file system techniques to exploit the fast random access that NVMs provide. It uses per-file logs to provide fast, atomic file operations, uses checksums and ECC to protect data and metadata from media errors and software bugs, and leverages DRAM to maximize performance. Experimental results show that in write-intensive workloads, NOVA provides 22% to 216x throughput improvement compared to state-of-the-art file systems, and 3.1x to 13.5x improvement compared to file systems that provide equally strong data consistency guarantees.
About the Organizer/Moderator:
Thomas Griffin is an Advisory Engineer and the Flash Characterization Technical Lead in IBM’s Systems Group. He has worked on SSD and NAND flash device characterization for the past eight years. He holds several US patents and has co-authored technical papers. Tom earned a BSEE and BA from the University of Notre Dame.

Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA, and Fibre Channel; and Storage Area Networks (SAN), and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer, and technical writer. He has participated in over 80 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters degree coursework at Stanford University.

Wednesday, August 9th
4:40-5:45pm
Session 204-A: MRAM (New Memory Technologies Track Track)
Organizer + Chairperson: Dave Eggleston, Principal, Intuitive Cognition Consulting

Panel Members:
Panelist: Jeff Lewis, Sr VP Development, Spin Transfer Technologies

Panelist: Terry Hulett, VP Systems Engineering, Everspin Technologies

Panelist: Seung Kang, Director, Engineering, Qualcomm

Panelist: Rahul Advani, VP Marketing, Netlist

Session Description:
MRAM is rapidly entering the marketplace with the production of 64Mb standalone STT-MRAM, and the integration of embedded MRAM integrated with 28nm logic. The world’s fastest SSDs leveraging a MRAM cache have been announced, and non-volatile (NV) logic with MRAM elements has been proposed. The distinguished panelists will discuss the enormous range of MRAM applications, the current state of development and commercialization, and the disruption and opportunities MRAM creates.
About the Organizer/Moderator:
Dave Eggleston is VP Memory at GlobalFoundries. He has responsibility for the embedded volatile and non-volatile memory businesses, as well as related strategic direction and initiatives. He was previously Principal of Intuitive Cognition Consulting, which provides strategic consulting to memory and storage companies. Dave is the former CEO and President of Unity Semiconductor, an RRAM industry pioneer acquired by Rambus. He has held technical executive management roles at Rambus, Micron (where he built the NAND systems engineering organization and led it for 12 years), SanDisk, and AMD. He holds 15 patents in NAND flash and next-generation ReRAM memory, storage system usage, and high volume manufacturing. He has also been a Vice-President of JEDEC. He earned his MSEE from Santa Clara University and his BSEE from Duke University.

Wednesday, August 9th
4:40-5:45pm
Session 204-B: 24 Gb/s SAS Opens the Way to the Latest High-Performance Apps (Controllers Track Track)
Session Sponsor: SCSI Trade Association (STA)
Organizer: Linda Capcara, PR Contact, SCSI Trade Association (STA)

Organizer + Chairperson: Rick Kutcipal, President, SCSI Trade Association (STA)

Panel Members:
Panelist: Dennis Martin, President, Demartek

Panelist: Kevin Marks, Principal Engineer, Dell

Panelist: Don Jeanette, VP, TrendFocus

Panelist: Jeremiah Tussey, Product Marketing Manager (Alliances), Scalable Storage Business Unit, Microsemi

Session Description:
SAS remains the most popular, best-supported SSD interface. The emerging 24Gb/s version opens up an entire new range of data-intensive applications including real-time analytics, deep packet inspection, big data processing, artificial intelligence, and the Internet-of-Things (IoT). SAS has always offered scalability, manageability, hot swap capability, and extensive error handling facilities, as well as an enormous ecosystem and drivers that are both time-proven and highly optimized. 24Gb/s SAS now delivers the throughput needed for the most demanding applications.
About the Organizer/Moderator:
Coming soon..

Rick Kutcipal is a Marketing Manager in Broadcom’s Data Center Storage Group and President of the SCSI Trade Association. Rick has 25 years experience in the computer/storage business. At Broadcom, he does product management and outbound marketing for data storage solutions with an emphasis on high-speed interconnects such as SCSI, Fibre Channel, InfiniBand, and 10 GbE. He has taken a major role in developing interconnect standards, having been a member of the T10 and T11 committees and chairing several working groups. He is a frequent conference participant, including the Data Storage Innovation event and previous Flash Memory Summits. He earned his MSEE and BSEE at the University of Utah.

Wednesday, August 9th
4:40-5:45pm
Session 204-C: Flash in Big Data Applications (Data Management Track Track)
Organizer + Chairperson: Mark Carlson, Principal Engineer, Industry Standards, Toshiba

Paper Presenters:
Real Time Persistent Computing for Big Data
Bernard Wu, Chief Bus Dv Officer, Levyx

Accelerating Hadoop Workloads Using Flash-Native Filesystem
Liran Zvibel, CTO And Co-Founder, WekaIO

Ultra-Low-Latency Elastic Infrastructure Offers Big Data Solutions
Emilio Billi, CTO, A3Cube

Novel Form Factor for High-Density Flash Scale-Out Storage Solutions
Indira Joshi, ,

Session Description:
Big data is everywhere today. Organizations are accumulating data at an incredible rate and want to get the most possible information out of it, hence the need to process and analyze more data than ever before. Flash memory can help provide the throughput needed to handle multiple petabytes of data and amounts even beyond that. It can eliminate the storage bottleneck that has occurred as a result of faster processors with multiple cores, higher-speed memories, faster buses, and hardware add-ons specifically aimed at off-loading big data applications. Meanwhile, flash memory prices are decreasing, thus allowing wider use of the technology in storage systems. This session describes methods for real time persistent computing and application acceleration, as well as a form factor specifically intended for big data applications.
About the Organizer/Moderator:
Mark A. Carlson, Principal Engineer, Industry Standards at Toshiba, has more than 35 years of experience with Networking and Storage development and more than 18 years experience with Java technology. Mark was one of the authors of the CDMI Cloud Storage standard. He has spoken at numerous industry forums and events. He is the co-chair of the SNIA Cloud Storage and Object Drive technical working groups, and serves as co-chair on the SNIA Technical Council.

Wednesday, August 9th
4:40-5:45pm
Session 204-D: Annual Update on Flash Memory for Non-Technologists (Business/Marketing Track Track)
Organizer + Chairperson: Jay Kramer, President, Network Storage Advisors

Paper Presenters:
Session Description:
"Why a four-year-old child could understand this report. Run out and find me a four-year-old child. I can't make head nor tail out of it."- Groucho Marx in Duck Soup Do you feel like the storage industry in which you participate every day is passing you by? Are you not sure about the meaning of QLC, NVDIMM, RoCE, and SDS – and afraid to ask? Do you think I/O determinism might have something to do with Darwin? If so, come let an expert speaker tell you what you really need to know about the very latest flash technologies. You’ll then be ready for the next round of revolutionary, disruptive, transformative, paradigm-shifting, and singularity-destroying advances that will come our way next year!
About the Organizer/Moderator:
Jay Kramer is a world recognized technology consultant specializing in training and delivering marketing services for the network storage industry. He has personally trained over 2000 professionals on storage networking, and he currently works with leading and emerging storage product companies worldwide. Jay has been VP Worldwide Marketing and Product Management for many storage companies including Sepaton (acquired by HDS), Astute Networks, iStor Networks, Infinity I/O, Maxtor, and Creative Design Solutions. He also has long experience in marketing and strategic planning at Unisys. An industry leader, he has served on the Board of Directors of the Fibre Channel Industry Association (FCIA) and was one of the Founders of the Flash Memory Summit. Jay has chaired SNIA committees and was a driving force in launching the first open systems SAN Certification Program, thus creating a career path for storage professionals. Jay has also been a featured speaker at industry conferences and has published articles and white papers on network storage, cloud storage, storage virtualization, data protection, and software defined storage. He is a graduate of Syracuse University’s Whitman School of Management with dual degrees in Marketing and Finance

Coming soon..

Thursday, August 10th
Thursday, August 10th
8:30-9:35am
Invited Talk 9: Ensuring Both Security and High Performance for Containers on Fl (Software Track Track)
Chairperson: Mike Gluck, VP/CTO, Sanity Solutions

Organizer: Brian Berg, President, Berg Software Design

Paper Presenters:
Ensuring Both Security and High Performance for Containers on Flash
Kevin Deierling, VP Marketing, Mellanox Technologies

Session Description:
Clouds are currently transitioning from disk to flash storage and from large, complex virtual machines to lightweight containers. As container deployment on flash storage becomes more widespread, network performance must increase to keep pace. At the same time, IT administrators must ensure proper security and isolation for containers. Traditional isolation methods reduce performance so much that they eliminate much of the advantage of lightweight containers. Hardware accelerators offer several ways to increase performance while still isolating container workloads and strengthening container security. The accelerators come with the Ethernet switch or adapter and allow developers to retain the flexibility and other advantages of containers without sacrificing security or performance.
About the Organizer/Moderator:
Mike Gluck is Vice President and CTO at Sanity Solutions. Mike has over 35 years of experience in the computer and data storage industry. His focus is assisting clients craft innovative data management solutions that provide distinctive value and competitive advantages for their strategic business goals. Internally, he analyzes key IT trends, paradigm shifts and disruptive technologies, searching for leading-edge vendors and products that can provide differentiation and competitive advantages for clients.

Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA, and Fibre Channel; and Storage Area Networks (SAN), and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer, and technical writer. He has participated in over 80 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters degree coursework at Stanford University.

Thursday, August 10th
8:30-9:35am
Session 301-A: Life Beyond Flash - New Non-Volatile Memory Technologies (New Memory Technologies Track Track)
Chairperson: Jim Cantore, President, JLC Associates

Organizer: Dave Eggleston, Principal, Intuitive Cognition Consulting

Panel Members:
Panelist: Patrick Patla, Executive VP Marketing, Everspin Technologies

Panelist: Hugues Metras, VP Strategic Partnerships, CEA-LETI

Panelist: Alex Yoon, Senior Technical Director, Lam Research

Panelist: Sylvain Dubois, VP Strategic Marketing & Business Development, Crossbar

Session Description:
Is there life after flash? Or will flash memory keep improving and dominate all NVM technology into the next decade? The panelists will peer into their crystal balls, and provide perspective on the great non-volatile beyond. They will provide insight and analysis on technology trends, disruption, singularities, product roadmaps and completion dates, and other memory issues that may go beyond human predictive capabilities. Bring your opinions, comments or Ouija board, tarot cards, fortune cookies, astrological instruments, tea leaves, or magic lamps and join in the discussion!
About the Organizer/Moderator:
Jim Cantore has been the President and Chief Analyst with JLC Associates, a high technology consulting firm since September 2003. Mr. Cantore consults in high technology, business development, strategic marketing and market intelligence to financial and high technology companies. He has over 29 years' combined experience in semiconductor, computer and solar industries. Mr. Cantore specializes in microprocessors, Intel; computer virtualization, graphics, nVidia, storage and network processors; DSP; power and analog chips; semiconductor business cycle analysis; DRAM; 3D NAND ReRAM, Storage Class Memory, SCM and NOR flash; solid state drives, SSD based systems; advanced non-volatile memory; STTRAM; CBRAM; 3D-Xpoint; Micron; Samsung; SK Hynix; Wafer procurement and supply, polycrystalline silicon, thin film PV; intellectual property; wafer foundry; 450 mm wafer fabs; semiconductor process roadmaps; EUV; optical critical dimensioning; front-end and back-end semiconductor manufacturing capital equipment; AMAT, ASML, LRCX; wafer scale and TSV packaging; back end assembly, OSATs; Data Center storage systems; Cloud technology; laptop PCs; tablet PCs; smart phones; advanced integrated fan-out wafer-level packaging (FO-WLP); advanced motion control; PCB laminate industry; Flexible PCBs; machine vision; flexible electronics and advanced ceramics semiconductor applications; motion control; wearable electronic devices; Cloud Systems; ioT.

Dave is the Vice President of Embedded Memory at GLOBALFOUNDRIES where he has responsibility for the embedded volatile and non-volatile memory businesses as well as the related strategic direction and initiatives. Dave is the former CEO and President of Unity Semiconductor, a RRAM industry pioneer acquired by Rambus. He has held technical and executive management roles at Rambus, Micron, SanDisk, and AMD. Dave has 30 years of engineering, marketing and strategy leadership in the semiconductor, memory and storage industries. He has deep knowledge of flash memory technology licensing and is well regarded in the technical and industry standardization community. He holds patents in NAND flash and next-generation ReRAM memory, storage system usage and high volume manufacturing.

Thursday, August 10th
8:30-9:35am
Session 301-B: Developing High-Performance Flash Systems (Enterprise Storage Track Track)
Organizer + Chairperson: Syed S. Hussain, Director, Winbond Electronics

Paper Presenters:
Using Programmable Hardware to Enable Next Generation Storage
Robert Pierce, ,

All-Flash Arrays for HPC Military/Defense Applications
Steve Cooper, CEO, One Stop Systems

High-Performance Dense Hybrid Memory Cube (HMC)-based Flash Memory for Storage A
Axel Kloth, President/CEO, SSR Labs

Session Description:
Early flash systems offered relatively modest performance and small capacity. However, more recent systems have moved more into the mainstream. Systems are now appearing that increase performance and flexibility by making flash a device with its own characteristics rather than a special kind of disk drive. Furthermore, flash systems are now available with sizes and performance levels comparable to the largest RAID boxes, particularly for use in big data, military/defense, high-performance computing, and appliance applications.
About the Organizer/Moderator:
Syed S. Hussain is Director Segment Marketing at Winbond Electronics, where he is responsible for networking, consumer, and wireless applications. He has been instrumental in Winbond achieving the top position in Serial-NOR flash in both units and revenues. He has developed major OEM/Partner alliances with Texas Instruments, Marvell, Qualcomm, Cisco, Broadcom, Intel, and Microsoft. Before joining Winbond, he was Manager Corporate Segment Marketing at SSTI (acquired by Microchip), where he responsible for the networking and computer segments. He was also VP Sales/Marketing at PaxcelNet, a startup that developed an accelerator for VPN boards. He has been a presenter, chairperson, organizer, and member of the Conference Advisory Board for Flash Memory Summit. He earned a BSEE from the University of Miami.

Thursday, August 10th
8:30-9:35am
Session 301-C: Get Compute Closer to Data with In-Storage/In-Memory Solution (Architectures Track Track)
Chairperson: Kimball Brown, Sr Director Alliances, BlackRidge Technology

Organizer: Eli Tiomkin, VP Business Development, NGD Systems

Paper Presenters:
Intelligent Storage Handles the Big Data Crisis
Vladimir Alves, CTO, NGD Systems

Intelligent Memory: Handle Big Data Faster by Combining Memory and Compute
Mike Amidi, CEO, Xitore

Session Description:
Traditional storage and memory devices have simply been data repositories. Now, with the advent of highly distributed systems, storage and memory must play a more active role. They need to become intelligent, that is, include compute as part of their nodes. The idea is to push processing as close to the data as possible. This minimizes the need to simply move data around, requiring huge amounts of bandwidth (and significant amounts of time) for transfers that accomplish nothing. The architecture includes computational nodes managing the compute nodes closest to the storage or memory and breaking the activity into many small, parallel pieces. So-called In-Situ processing technology pushes this concept to the absolute limit, putting the computational capability directly into the storage itself and eliminating the need to move the data to other memories before processing. Intelligent memory does the same for memory (which may be persistent, and thus have features of both memory and storage). Both approaches also cut networking costs significantly since bandwidth requirements are greatly reduced. The result is fully scalable and adaptable to emerging applications such as NoSQLdatabases, real-time data analysis, and the Internet-of-Things.
About the Organizer/Moderator:
Kimball Brown is Senior Director Alliances at security software firm BlackRidge Technology. He was previously a Technical Strategist at VMware, where he drove all product management and engineering workstreams between VMware HP and later Cisco. He has also been VP Senior Datacom Analyst at LightCounting, VP Business Development at Server Engines, and VP Marketing at server adapter maker Neterion. He also spent six years at Gartner as VP Chief Analyst Servers. He has long experience in the server market managing OEM and partner relationships, writing press releases, managing trade shows, developing company revenue forecasts and valuation models, and interacting with analysts and press. He has written many articles and spoken at many events. Kimball earned an MBA from UC Berkeley and a BSEE from Duke University.

Tiomkin spearheads marketing, business development, and sales activities for NGD Systems. He is a dynamic, creative storage executive with more than 20 years of extensive sales, marketing, and business development experience in the storage market, mainly around NAND/SSD. Among Eli’s previous companies are msystems, STEC, Violin Memory, Western Digital, and StorONE. Eli earned a bachelor’s degree in Marketing and an MBA with honors in International Business and Organizational Behavior from Oakland University, MI.

Thursday, August 10th
9:45-10:50am
Invited Talk 10: Flash-Based Edge Computing System for IoT (Architectures Track Track)
Organizer: Brian Berg, President, Berg Software Design

Chairperson: Brad Spiers, Principal Solutions Architect, Micron

Paper Presenters:
Flash-based Edge Computing Systems for IoT
Atsuhiro Kinoshita, Flashmatrix Project Lead (Ph.D., Eng.), Toshiba

Session Description:
Market researchers predict there will be 5.6 billion IoT devices connected to an edge computing solution by 2020. To keep required networking bandwidths reasonable, compute and storage resources must be moved closer to the edge. However, at the same time, such resources must be limited to keep edge costs from becoming excessive. One approach is to use machine learning techniques to glean insight from massive unstructured data sets without requiring highly sophisticated nodes. A new converged real-time edge computing architecture harnesses a very large non-volatile memory space to perform streaming analytics of heterogeneous sensor data for predictive analytics. Research has shown that the platform enables faster insight in a discrete manufacturing use case. It can be deployed to enable organizations to make real-time sense of IoT assets. Containerized microservices over traditional virtual machines are a robust way to provision and de-provision edge applications without overloading the network or making the nodes too expensive for widespread use.
About the Organizer/Moderator:
Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA, and Fibre Channel; and Storage Area Networks (SAN), and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer, and technical writer. He has participated in over 80 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters degree coursework at Stanford University.

Coming soon..

Thursday, August 10th
9:45-10:50am
Session 302-A: VC Forum (Business/Marketing Track Track)
Organizer + Chairperson: Wayne Rickard, Advisor, Radian Memory Systems

Panel Members:
Panelist: Stephen Socolof, Managing Partner, Tech Council Ventures

Panelist: Craig Orr, Director of Corporate Development, Samsung Strategy & Innovation Center

Panelist: Angel Orrantia, Business Development Director, SKTA Innovation Accelerator

Session Description:
The flash memory area is bursting out all over with many startups and high-priced acquisitions. What are the short-term and long-term investment prospects? What are VCs looking for in funding flash storage companies and what do they think will be the key factors in achieving success? Is there enough room for all the current flash storage companies? Do the current and projected revenues justify the valuations? Which companies are most likely to succeed? When (if ever) will MRAM, RRAM, and other alternative NVM technologies be ready for prime time? What effect will the current industry storage industry slowdown have? How do such current hot topics as NVMe (and NVMe over fabrics), persistent memory, NVDIMM, and 3D XPoint™ look as investment prospects?
About the Organizer/Moderator:
Wayne Rickard is VP of Business Development at Radian Memory Systems. Prior to taking on this role, Wayne was Radian’s first advisor and helped build out the company’s extended leadership team and strategic initiatives. Wayne has been a pioneer in storage networking, working hands on with the early versions of fibre channel and initiating standardization efforts through industry consortiums such as SNIA and FCIA. He was Co-Founder and held V.P. of Engineering and CTO roles at Gadzoox Networks, an early leader in fibre channel SAN switches. As a Director of Engineering at Emulex, Wayne led an Advanced Technology group that developed the industry’s first fibre channel HBA. He has held V.P. and division Chief Technologist positions at Seagate and been an Advisory Board member at PMC Sierra.

Thursday, August 10th
9:45-10:50am
Session 302-B: History Session (History Track Track)
Chairperson: Alan Weissberger, Content Manager, IEEE Communications Society

Organizer: Brian Berg, President, Berg Software Design

Paper Presenters:
HDD Technology: Past, Present and Future
Peter Goglia, Vice-President, Plasma Therm

Session Description:
“By the 1990s the dollar value of magnetic recording devices produced by companies located in California's "Silicon Valley" exceeded the dollar value of semiconductor devices produced there, leading some to suggest that a more appropriate name for this area would be "Iron Oxide Valley," after the magnetic material coating the disks.” – Wikipedia The commercial use of hard disk drives began in 1956 with the shipment of a production IBM 305 RAMAC system including IBM Model 350 disk storage. Its capacity was five megabytes, considered at the time to be an incredibly large amount. According to Currie Munce, VP at Hitachi Global Storage Technologies, ”…the RAMAC unit weighed over a ton, had to be moved around with forklifts, and was delivered via large cargo airplanes.” It cost about $50K (equivalent to about $500K in 2017 dollars). Today, over a half billion units are sold annually with typical sizes around 4 TB (available in virtually any office supply or consumer electronics store for a few hundred dollars and ready to be carried home in a small plastic bag). How did this amazing story happen? Who were the key figures? What were the breakthroughs in read/write heads, thin film media, and other technologies that made it all possible? Join us in a trip down History Lane through the amazing series of miniaturizations and trends over the years. Who would have thought in 1957 that hard disk drives would play a major role 60 years later at the Computer History Museum while still remaining a multi-billion dollar industry with even more advances ahead?
About the Organizer/Moderator:
Alan J Weissberger is the Content Manager for the global IEEE ComSoc Community websites (techblog.comsoc.org and community.comsoc.org), Manager and Moderator of the IEEE Member Discussion list, NA Correspondent for the IEEE Global Communications Newsletter, Chairman Emeritus and Advisor to IEEE ComSocSCV. Alan was the founder and past Chairman of the IEEE Silicon Valley Technology History committee. He is an IEEE Sr Life Member who was an adjunct professor at SCU EE Dept and also taught a EE graduate class at UC Berkeley. Mr. Weissberger specializes in telecommunications and enterprise networking technologies, market positioning, competitive analysis and applications as well as intellectual property research. These are reflected in his posts at techblog.comsoc.org.

Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA, and Fibre Channel; and Storage Area Networks (SAN), and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer, and technical writer. He has participated in over 80 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters degree coursework at Stanford University.

Thursday, August 10th
9:45-10:50am
Session 302-C: How Flash Will Transform Enterprise Applications (Enterprise Applications Track Track)
Chairperson: Marc Staimer, President, Dragon Slayer Consulting

Organizer: Tom Burniece, President, Burniece Consulting Services

Panel Members:
Panelist: Tom Isakovich, CEO/Founder, Nimbus Data

Panelist: Rob Commins, VP Corporate Marketing, Tegile Systems

Panelist: Farid Yavari, VP Technology, FalconStor Software

Panelist: Jamie Panagos, Sr Director Video Operations/IP Delivery, Charter Communications

Panelist: Steve Knipple, Principal Consultant, Cloud Shift Advisors

Session Description:
Flash memory has already increased the performance of enterprise applications tremendously. However, we have just begun to see the long-term effects. Flash will find even more uses with all-flash arrays dominating local storage, server-side and storage-side caches providing higher performance, and even cold storage moving to flash rather than disk or tape. Real-time analytics will be a key area of interest with both computational performance and access to big data being essential. New developments such as flash on the memory bus and persistent and storage-class memory will maker flash even more important. Data centers will need to take full advantage of flash memory at every level – in computers, in servers, in networks, and in storage systems.
About the Organizer/Moderator:
Marc Staimer is the founder, senior analyst and CDS at Dragon Slayer Consulting in Beaverton, Ore. The consulting practice has focused on the areas of strategic planning, product development and market development. With more than 30 years of marketing, sales and business experience in infrastructure, storage, server, software and virtualization, Marc is considered one of the industry's leading experts.

Tom Burniece is an independent business consultant with over 30 years of senior management experience in the networking and storage markets. He specializes in strategy formulation, business development, marketing, and due diligence. He has worked with well over 50 companies from unfunded startups to large public corporations, including venture and private equity firms. He is a highly experienced CEO and board member and has been general manager with profit and loss responsibility for a billion-dollar division of Digital Equipment. Before becoming an independent consultant, he was also Chairman of Ciprico and a senior executive at Maxtor and Control Data. He holds a BEE from the University of Minnesota and an MSEE from Arizona State University. He is also a graduate of MIT’s Sloan Senior Executive Program.

Thursday, August 10th
9:45-10:50am
Session 302-D: CTO Panel (Business/Marketing Track Track)
Organizer + Chairperson: Rob Peglar, Independent Consultant, Advanced Computing and Storage

Panel Members:
Panelist: J Metz, Office Of The CTO/Board Member, Cisco Systems

Panelist: Hubbert Smith, Strategy/Business Development Director, Samsung Semiconductor

Panelist: Steve Pawlowski, VP Advanced Computing Systems, Micron

Session Description:
CTOs and their staff do not have an easy life in the flash memory industry. Things are changing rapidly, and the road ahead is almost impossible to discern or understand. So what are these people thinking currently? What do they see as basic trends that will determine the course of nonvolatile memory technology? And what do they think are just transient issues that will soon be forgotten? What prized techniques can they recommend (such as crystal balls, Ouija boards, and tarot cards) for gauging the future?
About the Organizer/Moderator:
Rob Peglar is Sr VP/CTO at startup Symbolic IO, where he focuses on making complex workloads simpler, optimizing the use and understanding of data by businesses, and educating storage users. He was previously Vice President, Advanced Storage at Micron Technology, and a member of the Storage Business Unit’s five-person global leadership team. The unit, with $3-plus billion dollars annual revenue, provides solid state disk (SSD) and other non-volatile memory products such as 3D NAND and 3D Xpoint™. Rob is a 40-year veteran of the storage industry, published author, and frequent industry speaker at leading storage and cloud-related seminars and conferences worldwide. He was previously CTO Americas for EMC Isilon, responsible for customer-facing scale-out NAS technology requirements, designs, and implementations. Rob’s team directed hundreds of strategic customer engagements, spanning multiple product releases and integrated solutions stacks. His team pioneered the first customer deployments of the Hadoop Filesystem (HDFS) embedded in a scale-out NAS platform. He has also been a Senior Fellow and VP Technology at Xiotech, principal storage architect for StorageTek, and Manager of UNIX Development for ETA Systems. Rob is a member of the Board of Directors of the Storage Networking Industry Association (SNIA) and a member of the Program Executive Committee for the Flash Memory Summit. He holds a BS in computer science from Washington University (St. Louis, MO) and did graduate work there.

Thursday, August 10th
1:30-2:45pm
Invited Talk 11: Solving 3D Flash’s Error Recovery Problem (Architectures Track Track)
Organizer: Brian Berg, President, Berg Software Design

Chairperson: Tom Burniece, President, Burniece Consulting Services

Paper Presenters:
Solving 3D Flash’s Error Recovery Problem
Conor Ryan, CTO, NVMdurance

Session Description:
A major drawback of 3D flash is that error recovery can be slow and costly, particularly with TLC and QLC devices. LDPC coding, generally the most effective approach, uses a lot of controller real estate and may take a long time to generate meaningful results. The outcome is often significantly reduced bandwidth and higher-than-expected latency. A new method, called SmartECC, greatly improves current ECC techniques by applying simple rules to extend their capabilities. Machine learning techniques generate the rules automatically during a full characterization of the devices, and the rules can be tailored for specific use cases. SmartECC improves performance dramatically for any ECC method. Furthermore, the characterization also produces information useful to any active management system at the controller level.
About the Organizer/Moderator:
Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA, and Fibre Channel; and Storage Area Networks (SAN), and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer, and technical writer. He has participated in over 80 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters degree coursework at Stanford University.

Tom Burniece is an independent business consultant with over 30 years of senior management experience in the networking and storage markets. He specializes in strategy formulation, business development, marketing, and due diligence. He has worked with well over 50 companies from unfunded startups to large public corporations, including venture and private equity firms. He is a highly experienced CEO and board member and has been general manager with profit and loss responsibility for a billion-dollar division of Digital Equipment. Before becoming an independent consultant, he was also Chairman of Ciprico and a senior executive at Maxtor and Control Data. He holds a BEE from the University of Minnesota and an MSEE from Arizona State University. He is also a graduate of MIT’s Sloan Senior Executive Program.

Thursday, August 10th
1:30-2:45pm
Session 303-A: The Next Breakthroughs in NAND Flash (Flash Technology Track Track)
Chairperson: Barry Hoberman, Conference Chair, MRAM Developer Day

Organizer: Chuck Sobey, Chief Scientist, ChannelScience

Panel Members:
Panelist: Rob Peglar, Independent Consultant, Advanced Computing and Storage

Panelist: Bob Doud, Senior Director of Marketing, Mellanox

Panelist: Manuel d'Abreu, Sr VP / Chief Scientist, Smart IOPS

Panelist: Harmeet Singh, Corporate VP, Lam Research

Panelist: Onur Mutlu, Professor, Carnegie-Mellon University

Panelist: Engling Yeo, VP Engineering, GOKE US RESEARCH LABORATORY

Session Description:
One of the main purposes for employing flash memory is to accelerate applications. Many of the most popular recent applications, such as business analytics and NoSQL databases, often run quite slowly, particularly as their datasets increase in size. Furthermore, high-speed SSDs may themselves require acceleration as their requirements are beyond the capabilities of many low-end processors.NAND flash technology has produced several breakthroughs in the last few years which have consolidated its position as the leading type of nonvolatile memory. What’s in store now? Will there be new types of 3-D technology? How about variations on QLC providing even more levels in a cell? How about new approaches to scaling cells that could provide higher performance and less wear? There are many possibilities out there, but the investment is high and the simple concepts have already been developed. Obviously, the lack of any major breakthrough would help open the door to other non-volatile technologies such as MRAM, RRAM, 3D XPoint, and memristors.
About the Organizer/Moderator:
Barry Hoberman has more than 35 years of management and engineering expertise in the semiconductor industry. He most recently served as CEO at Spin Transfer Technologies. Prior to Spin Transfer Technologies, Barry was the founder and CEO of inSilicon, a leading semiconductor IP supplier, which was acquired by Synopsys in 2002. His leadership experience also includes CEO positions with Virtual Silicon and T-Zero Technologies, and Chief Marketing Officer at Crocus Technology. Earlier in his career, Hoberman held management positions at AMD and Monolithic Memories. ”

Chuck Sobey is an internationally-respected technology advisor, researcher, and lecturer. He is the founder of the confidential R&D services firm ChannelScience, which works with startups, Fortune 100 companies, and large institutions to develop new capabilities in data storage and establish the state-of-the-art. He has deep expertise in the design, function, manufacture, and test of data storage devices. Chuck is currently applying machine learning techniques to reduce R&D cycle times and is developing signal processing and coding algorithms matched to the physics of STT-MRAMs (spin transfer torque).As China focuses on flash as a strategic initiative, Chuck was honored to give the opening technical keynote address at the first flash conference held there.Chuck is an electrical and computer engineering graduate of Carnegie Mellon University and the University of California at Santa Barbara.

Thursday, August 10th
1:30-2:45pm
Session 303-B: Ultra-fast NVMe Storage Networks for Next Generation Flash Arrays (NVMe-oF Track Track)
Chairperson: J Metz, Office Of The CTO/Board Member, Cisco Systems

Organizer: Linda Capcara, PR Contact, FCIA (Fibre Channel Industry Association)

Panel Members:
Panelist: Greg Scherer, VP CTO, Cavium

Panelist: Dennis Martin, President, Demartek

Session Description:
Shared storage is essential for large-scale applications to provide fast access to huge amounts of storage in a cost-effective, scalable way. Fortunately, NVMe can take full advantage of the unique properties of pipeline-rich, random access, memory-based storage arrays. The FCIA panel offers unique insight into how to create powerful flash storage networks, including: - A reference design that shows a simple way to add FC-NVMe to your current infrastructure - A use case focused on how FC-NVMe can help you share an all flash array to speed up an entire range of applications - A description of how to extend Fibre Channel prioritization to provide prioritization for virtualized environments - A discussion of how to take advantage of Fibre Channel Forward Error Correction (FEC) and end-to-end support from purchase through deployment
About the Organizer/Moderator:
J is currently an R&D Engineer for the Office of the CTO for the Compute and Server Group for Cisco Systems, but has a broad and eclectic background of both academic, corporate, and industry experience. He is an award-winning public speaker, author, and contributor to industry trade publications. He has been active in industry standards, with membership on the Board of Directors for the Fibre Channel Industry Association (FCIA), Storage Networking Industry Association (SNIA), and the Non-Volatile Memory Express (NVMe) Promoter’s Board. He received his Ph.D from the University of Georgia.

Coming soon..

Thursday, August 10th
1:30-2:45pm
Session 303-C: Application Acceleration (Enterprise Applications Track Track)
Organizer + Chairperson: Aaron Behman, Sr. Director of Marketing, Flashmatrix, Toshiba

Paper Presenters:
Accelerating Data Analytics Using FPGAs & an Integrated Flash Storage Solutions
HK Verma, Principal Engineer, Xilinx

Improving NVMe Performance w/an Accelerator That Offloads Command Submission
Hiren Patel, VP Business Development, Intelliprop

Accelerating Flash with OpenCAPI and Power Systems
Brian Allison, Sr Technical Staff, IBM

Session Description:
One of the main purposes for employing flash memory is to accelerate applications. Many of the most popular recent applications, such as business analytics and NoSQL databases, often run quite slowly, particularly as their datasets increase in size. Furthermore, high-speed SSDs may themselves require acceleration as their requirements are beyond the capabilities of many low-end processors.
About the Organizer/Moderator:
Coming soon..

Thursday, August 10th
3:00-4:15pm
Session 304-A: Flash and the Internet of Things (Embedded Applications Track Track)
Chairperson: Nidish Kamath, SSD Product Marketing and Planning, Toshiba

Organizer: Dave Eggleston, Principal, Intuitive Cognition Consulting

Paper Presenters:
Applying Flash in the Industrial IoT
Erik Jones, Field Application Engineer, Hyperstone

More Reliable SSDs and Mobile Flash Solutions for Automotive & IoT Appllications
Lancelot Hu, Product Marketing Manager, Silicon Motion

Embedded 28nm Charge-Trap NVM Technology
Igor Kouznetsov, Senior Director of Marketing, Intellectual Property, Cypress Semiconductor

Securing Networked Embedded Applications with Secure Boot
Suhail Zain, Director Systems Engineering, Cypress Semiconductor

Session Description:
The Internet of Things (IoT) has been described as the largest opportunity of the next decade. But what is IoT? What role does flash memory have in enabling IoT? This session will discuss why the merger of sensors, micro-controllers, and flash memory into a mesh of Things will improve life for all mankind.
About the Organizer/Moderator:
Nidish Kamath is a technologist with 15+ years of engineering and marketing experience in AFA storage, storage networking and wireless IOT systems. He is currently in product planning at Toshiba, focused on emerging memory technology, such as MRAM and ReRAM, developing requirements for Toshiba’s future SCM and QLC product lines. At Avalanche Technologies, Nidish developed the RAID, erasure coding and inline de-dupesubsystems for the Avalanche AFA product line. Nidish is a co-author of 10+ patents – including MRAM modules and persistent memory in IOT/Edge Computing. He has published a journal paper on machine learning, and holds a B.Tech (EE) degree from IIT Bombay and a MBA degree from UCLA

Dave Eggleston is VP Memory at GlobalFoundries. He has responsibility for the embedded volatile and non-volatile memory businesses, as well as related strategic direction and initiatives. He was previously Principal of Intuitive Cognition Consulting, which provides strategic consulting to memory and storage companies. Dave is the former CEO and President of Unity Semiconductor, an RRAM industry pioneer acquired by Rambus. He has held technical executive management roles at Rambus, Micron (where he built the NAND systems engineering organization and led it for 12 years), SanDisk, and AMD. He holds 15 patents in NAND flash and next-generation ReRAM memory, storage system usage, and high volume manufacturing. He has also been a Vice-President of JEDEC. He earned his MSEE from Santa Clara University and his BSEE from Duke University.