Tuesday, August 2nd
Tuesday, August 2nd
8:30-9:35 AM
BMKT-101-1: Data Storage Strategies (Business Strategies and Memory Markets Track)
Organizer + Chairperson: Jean Bozman, President, Cloud Architects Advisors

Paper Presenters:
Archives Libraries
Kenneth Wing, CEO, Storage Recovery Migration Services. Offices in California, Taipei, Tokyo, Germany.

Leveraging Tape to Support Primary Flash Storage
Rich Gadomski, Head of Tape Evangelism, FUJIFILM Recording Media USA

Incubating the Future of Storage
Wim De Wispelaere, Vice President of Strategic Initiatives, Western Digital (WDC)

Javier Gonzalez, Principal Software Engineer, Samsung Electronics

Session Description:
Coming soon..
About the Organizer/Moderator:
Jean S. Bozman is President of Cloud Architects Advisors, a market research and consulting firm focused on hardware and software for enterprise and hybrid multi-cloud computing. She analyzes the markets for servers, storage, and software related to datacenters and cloud infrastructure. A highly-respected IT professional, she has spent many years covering the worldwide markets for operating environments, servers, and server workloads. She was a Research VP at IDC, where she focused on the worldwide markets for servers and server operating systems. She is a frequent conference participant as a speaker, chairperson, and organizer at such events as Flash Memory Summit, OpenStack, and Container World. She is often quoted in a variety of publications including BusinessWeek, Investor’s Business Daily, the Los Angeles Times, CNET, Bloomberg, and Reuters. Ms. Bozman has also been VP/Principal Analyst at Hurwitz and Associates and Sr Product Marketing Manager at Sandisk. She earned a master’s degree from Stanford.

Tuesday, August 2nd
8:30-9:35 AM
CASE-101-1: Case Studies Session 1 (Case Studies Track)
Organizer + Chairperson: Tom Burniece, President, Burniece Consulting Services

Paper Presenters:
Disaggregated high-performance storage for CDN
Scott Hamilton, Data Center Systems BU, Western Digital (WDC)

Session Description:
Coming soon..
About the Organizer/Moderator:
Tom Burniece is an independent business consultant with over 30 years of senior management experience in the networking and storage markets. He specializes in strategy formulation, business development, marketing, and due diligence. He has worked with well over 50 companies from unfunded startups to large public corporations, including venture and private equity firms. He is a highly experienced CEO and board member and has been a general manager with profit and loss responsibility for a billion-dollar division of Digital Equipment. Before becoming an independent consultant, he was also Chairman of Ciprico and a senior executive at Maxtor and Control Data. He holds a BEE from the University of Minnesota and an MSEE from Arizona State University. He is also a graduate of MIT’s Sloan Senior Executive Program.

Tuesday, August 2nd
8:30-9:35 AM
CLDS-101-1: Cloud Performance (Cloud Storage and Applications Track)
Organizer + Chairperson: MIke McKean, VP, Encore Semi

Paper Presenters:
Highly scalable and performant All Flash CEPH Storage with NVMe-oF
David Tobin, Technologist, Western Digital (WDC)

Painlessly Realizing Transparent Compression over Disaggregated Infrastructure
Tong Zhang, Chief Scientist, ScaleFlux

How Much Power Does Your Storage System or Device Consume?
Wayne Adams, SNIA Chairman Emeritus, SNIA

Session Description:
Coming soon..
About the Organizer/Moderator:
Mike McKean is currently Director of Sales at Encore Semi, a design services firm focused on ASIC and firmware/software design and development. At Encore Semi, he leverages his ASIC and firmware background to grow key accounts and support projects with technical skills. He is currently leading firmware development for projects using multiple SSD controller architectures. Before joining Encore, Mike was VP Product Solutions at cybersecurity startup FHOOSH and General Manager for the Colorado Design Center of Synapse Design Automation. At Synapse, Mike led the successful execution of multiple HDD, SDD, and consumer electronics projects. He has 30 years experience in the semiconductor and systems industries. Mike is a regular presenter, chairperson, and organizer at Flash Memory Summit. He earned an MBA from the University of Texas at Austin and a BS in Engineering Science from Trinity University (TX).

Tuesday, August 2nd
8:30-9:35 AM
DCTR-101-1: Enterprise Storage Part 1 (Data Center Applications Track)
Organizer + Chairperson: Howard Marks, Technologist Extraordinary, VAST Data

Paper Presenters:
QLC Value with No Compromise! Extended Performance, Reliability and Drive Life
Tim Amundsen, Senior Sales Engineer, Pliops

Enterprise QLC, Optimized
Timothy Fisher, Flash Controller HW Lead, IBM

QLC NAND SSDs: Delivering Value in Top Enterprise and Cloud Workloads
David Leone, Datacenter SSD Solutions Director, Solidigm

Session Description:
Coming soon..
About the Organizer/Moderator:
Howard Marks has been writing, speaking, and consulting about enterprise technology for over thirty years. As a consultant, he has designed storage, server, and network infrastructures for organizations such as The State University of New York (Purchase), BBDO Worldwide, and the Foxwoods Resort Casino. He also operates an independent laboratory (DeepStorage) which tests storage products for both vendors and magazines. He started testing and reviewing products at PC Magazine in the late 1980s and has written hundreds of articles and product reviews for such media as Network World, Network Computing, and InformationWeek. A top rated speaker at industry events, he has spoken at Storage Decisions, Interop, and Microsoft’s TechEd. He has also developed training programs for organizations such as JP Morgan and American Express.

Tuesday, August 2nd
8:30-9:35 AM
EDGE-101-1: Edge Computing/Cloud Overview (Panel) (Edge Computing Track)
Moderator: David McCarthy, , IDC

Panel Members:
Panelist: Arie van der Hoeven, Principal Program Manager, Seagate Technology

Panelist: Tejas Chopra, Sr. Software Engineer, Netflix

Panelist: Daniel Fan, Product Manager, Innodisk Corporation

Session Description:
What is the current state of edge, cloud computing and is one segment more important/vital than the other? It is often said that the most current, most reliable data is located at the edge and if that is true how do we ensure it is safe, reliable and available to decision makers when and where it is needed. As processing gets pushed more toward the edge we need to simultaneously centralize it so it can be used to make fast, accurate decisions that effect the entire ecosystem. Where will the data exist in five years and do we really care as long as it is instantly available to the total ecosystem. Silos of data are being torn down as we level out the analysis/use of the information across the spectrum. Propriety of solutions will be rapidly replaced as we use storage as the tool to facilitate tomorrow's systems/solutions. Find out where you stand in the ecosystem of tomorrow and how you can be prepared to meet the needs that don't even exist...yet.
About the Organizer/Moderator:
Coming soon..

Tuesday, August 2nd
8:30-9:35 AM
FMAR-101-1: ZNS: An Endurance Architecture, Part 1 (Flash Memory Architectures Track)
Organizer + Chairperson: Brian Berg, President, Berg Software Design

Paper Presenters:
Design Challenges and Tradeoffs with QLC-Based ZNS SSDs
Guanying Wu, Principal Engineer, Silicon Motion

Challenges in Zoned Namespace Testing
Kean Yau Chaw, Application Engineer, Advantest

Session Description:
In 2020, the NVMe standard was expanded to include a Zoned Namespaces (ZNS) command set for use with SSDs, an effort which grew out of Open-Channel. ZNS allows an SSD to be able to perfectly align data to its flash media, resulting in expanded storage capacity, reduced write amplification and access latency, and thereby greater overall endurance of the SSD. This session will include talks that address various aspects of ZNS, including dealing with QLC media, testing a ZNS implementation, and gaining the full benefits of ZNS.
About the Organizer/Moderator:
Through his Berg Software Design consultancy, Brian provides hardware and software design and development services for storage and interface technologies in consumer electronics, including flash memory, NVMe and USB. Brian has been a developer, project lead, industry analyst, seminar leader, technical marketer and technical writer. He has participated in over 80 conferences as a speaker, session chair and conference chair. He has also worked extensively with intellectual property and patents, particularly in the storage arena. He is active as an IEEE officer and volunteer, including as past Chair of the Santa Clara Valley Section, Director and past Chair of the Consultants Network of Silicon Valley, Region 6 IEEE Milestone Coordinator, Chair of the SCV Technical History Committee, and past Liaison for the Women in Engineering Affinity Group. Brian is an IEEE awards recipient, including the 2017 Outstanding Leadership and Service to the IEEE within Region 6, the 2017 IEEE-USA Professional Leadership Award for Outstanding Service to the Consulting and Electrical Engineering profession, and the 2012 Outstanding Leadership and Professional Service Award for Region 6.

Tuesday, August 2nd
8:30-9:35 AM
INVT-101-1: Invited Talk with Debendra Das Sharma (Invited Talks Track)
Chairperson: Leah Schoeb, Sr. Developer Relations Manager, AMD

Organizer: Brian Berg, President, Berg Software Design

Paper Presenters:
UCIe: An Open Industry Standard for Chiplets
Debendra Das Sharma, Intel Senior Fellow, Chief Architect of I/O Technology and Standards, Intel, Universal Chiplet Interconnect Express (UCIe)

Session Description:
As Artificial Intelligence is becoming more pervasive, the global spending on AI systems is forecasted to double over the next four years, from $50.1 billion in 2021 to more than $110 billion in 2024. The fundamental challenge lies with the sheer amount of compute power needed to build and train many of the more advanced AI models that are being developed. This session will hear from industry experts and innovators on the challenges of AI workloads and the evolving compute architectures needed as the platform to support AI and ML innovations.
About the Organizer/Moderator:
Leah Schoeb is a Sr Developer Relations Manager in the platform architecture team at AMD, where she engages with solid state storage vendors on storage technology futures. She has over 25 years of experience in the computer industryShe was previously Acting Director Reference Architecture at Intel, where she led a team of segment managers and architects managing cross functional teams for flash and NVMe based data solutions, and reference architectures in major cloud and enterprise solution design assignments. She has held management and engineering positions at VMware, Dell, and Sun Microsystems, and was also a Senior Partner at the analyst firm Evaluator Group, where she focused on storage, virtualization, and cloud infrastructure. Leah has ten publications on such subjects as optimizing Oracle, automated tiering, and solid state performance specifications, and has presented at many technical conferences. She currently serves as the Industry Trends Chairperson for Flash Memory SummitShe earned an MBA at the University of Phoenix and a BSEE at the University of Maryland, College Park.

Through his Berg Software Design consultancy, Brian provides hardware and software design and development services for storage and interface technologies in consumer electronics, including flash memory, NVMe and USB. Brian has been a developer, project lead, industry analyst, seminar leader, technical marketer and technical writer. He has participated in over 80 conferences as a speaker, session chair and conference chair. He has also worked extensively with intellectual property and patents, particularly in the storage arena. He is active as an IEEE officer and volunteer, including as past Chair of the Santa Clara Valley Section, Director and past Chair of the Consultants Network of Silicon Valley, Region 6 IEEE Milestone Coordinator, Chair of the SCV Technical History Committee, and past Liaison for the Women in Engineering Affinity Group. Brian is an IEEE awards recipient, including the 2017 Outstanding Leadership and Service to the IEEE within Region 6, the 2017 IEEE-USA Professional Leadership Award for Outstanding Service to the Consulting and Electrical Engineering profession, and the 2012 Outstanding Leadership and Professional Service Award for Region 6.

Tuesday, August 2nd
8:30-9:35 AM
NVME-101-1: NVM Express State of the Union and Upcoming Technical Proposals (NVMe Track)
Session Sponsor: NVM Express
Chairperson + Speaker: Peter Onufryk, Fellow Data Center Solutions BU, Intel

Paper Presenters:
NVM Express State of the Union: The Language of Storage
Peter Onufryk, Fellow Data Center Solutions BU, Intel

What's New in NVMe Technology: Ratified Technical Proposals
Mike Allison, Sr. Director, Samsung/NVM Express

Session Description:
Coming soon..
About the Organizer/Moderator:
Peter is an Intel Fellow in the Design Engineering Group at Intel. He has been active in NVMe standardization as an NVMe Board Member, NVMe Management Workgroup Chair, and NVMe Technical Workgroup Chair. Peter holds over 40 patents and has written several published articles and books. Before Intel, Peter was a Fellow in the Data Center Solutions business unit at Microchip responsible for storage product architecture. He was previously Director of Engineering at Integrated Device Technology (IDT) and a research staff member at AT&T Bell Labs. Peter earned a Ph.D. in Electrical and Computer Engineering from Rutgers University and an MSEE from Purdue University.

Tuesday, August 2nd
8:30 AM-9:35 AM
SARC-101-1: Storage and Memory Tiering (System Architectures Track)
Session Sponsor: SNIA
Organizer + Chairperson: Willie Nelson, Technology Enabling Manager, Intel

Paper Presenters:
Flash and Tiered Memory Systems
Maher Amer, Co-Founder, Thikra Technology

Near-Memory-Computing- The Hidden Winner?
Marko Noack, Member of Technical Staff, Ferroelectric Memory

Power & Latency Analysis of the Memory Tiering Pyramid
Allan Cantle, CEO, Nallasway

Session Description:
Coming soon..
About the Organizer/Moderator:
Willie Nelson has been with Intel Corporation for over 23 years and is currently a Technology Enabling Manager, working with ecosystem partners to ensure new IO technologies are co-developed and ready for deployment by the industry. At SNIA, he is a member of the SNIA Compute, Memory, and Storage Governing Board, and is the SNIA liaison to the CXL Consortium.

Tuesday, August 2nd
8:30-9:35 AM
SPOS-101-1: MemVerge Part 1: CXL Consortium Update & CXL Compatible Processors (Sponsored Sessions Track)
Session Sponsor: MemVerge
Organizer + Moderator: Frank Berry, VP Marketing, MemVerge

Panel Members:
Panelist: Steve Glaser, Principal Engineer, PCI-SIG Board Member, NVIDIA

Panelist: Willie Nelson, Technology Enabling Manager, Intel

Panelist: Siamak Tavallaei, CXL™ Consortium President and Chief Systems Architect, Google, Google

Panelist: Shalesh Thusoo, VP CXL Business Unit, Marvell

Session Description:
Part 1: CXL-Consortium Update and CXL-Compatible Processors Getting Ready for Take-off The goals of the full-day forum are to provide a 3600 view of development activity in the CXL ecosystem, and accelerate collaboration by sharing information about vendor technology partner programs. During this session, Siamak Tavallaei, President of The CXL Consortium and Chief Systems Architect at Google Systems Infrastructure will provide an update on the CXL project and ecosystem. His update will be followed by presentation from 2 CXL-compatible processor vendors who will describe their vision for their class of CXL-compatible technology, its impact on application use cases, and how other vendors can work with your organization to integrate your technology.
About the Organizer/Moderator:
Frank Berry is VP Marketing for MemVerge, a developer of enterprise-class memory virtualization software. He leads the company’s product marketing and market development efforts for products that are making persistent memory, storage at memory speeds, into a standard element in storage systems. A 30-year veteran of the storage industry, Frank has held senior engineering, sales, and marketing positions including VP Worldwide Marketing for Quantum and VP Product Marketing at QLogic. Frank is a popular conference speaker and has written hundreds of analyst reports, blogs, and feature articles.

Tuesday, August 2nd
8:30-9:35 AM
SSDS-101-1: SSD Controllers (SSD Technology Track)
Organizer + Moderator: Erich Haratsch, Senior Director Architecture, Marvell

Paper Presenters:
RISC Five as Easy as Pi
Paul Sherman, Electrical Engineer, Self

Enabling Flexibility in the NVMe SSDs for the Cloud Scale Architecture
Sanketh Srinivas, Tech staff Applications Eng, Microchip

Validating and improving QLC enterprise controllers with data-driven development
Roman Pletka, Research Staff Member, IBM Research

Session Description:
Coming soon..
About the Organizer/Moderator:
Erich Haratsch is Senior Director Architecture in the Storage Business Unit of Marvell Semiconductor where he is focused on data storage architectures and controller technologies. He was previously Managing Technologist at Seagate Technology where he led a senior R&D team that developed new hardware architectures and firmware algorithms for solid state disks that successfully went into mass production. Earlier in his career he developed signal processing and error correction technologies for hard disk drive controllers at LSI Corporation and Agere Systems which shipped in hundreds of millions of devices. He started his engineering career at Bell Labs Research where he invented new chip architectures for Gigabit Ethernet over copper and optical communications. He is a frequent speaker at leading industry events and is the author of over 60 peer-reviewed journal and conference papers and holds more than 200 U.S. patents. He earned his M.S. and Ph.D. degrees in electrical engineering from the Technical University of Munich Germany

Tuesday, August 2nd
9:45-10:50 AM
BMKT-101-2: Market Research Panel (Business Strategies and Memory Markets Track)
Organizer + Moderator: Jean Bozman, President, Cloud Architects Advisors

Panel Members:
Panelist: Chris DePuy, Research Analyst/Co-Founder, 650 Group

Panelist: Simone Bertolazzi, Technology and Market Analyst, Yole Dveloppement

Panelist: Camberley Bates, Managing Director, Evaluator Group

Panelist: Jeff Janukowicz, Vice President, IDC

Session Description:
In this session, four highly-regarded analysts will present their views about the state of today’s flash memory market – and what’s ahead for flash technology. Come hear what some of the leading minds of the industry think of the current business – and what they expect the future to bring. The panel discussion will highlight the top issues that are changing the flash market today. Topics will include flash arrays, NVDIMMs, NVMe; and NVMe on Fabric (NVMe-OF); DRAM; hard-disk-drives (HDDs); software-defined storage (SDS); pricing trends across the industry; among others. The status of emerging technologies, using new types of materials, will also be discussed. Key questions in this session: What is the future of custom flash devices? What is the future of hard-disk drives (HDDs)? What is the future for Computational Storage and Persistent Memory? How are customers adopting software-defined storage (SDS)? How are Edge and Cloud affecting the way customers are using flash memory? Panelists are Camberley Bates, Managing Director, The Evaluator Group; Jeff Janukowicz, Research Vice President, IDC; Chris DePuy, The 650 Group; and Simone Bertolazzi, Yole Developpement You will be able to ask the panel about your top-of-mind issues during the question-and-answer session. Bring your best questions, and participate!!
About the Organizer/Moderator:
Jean S. Bozman is President of Cloud Architects Advisors, a market research and consulting firm focused on hardware and software for enterprise and hybrid multi-cloud computing. She analyzes the markets for servers, storage, and software related to datacenters and cloud infrastructure. A highly-respected IT professional, she has spent many years covering the worldwide markets for operating environments, servers, and server workloads. She was a Research VP at IDC, where she focused on the worldwide markets for servers and server operating systems. She is a frequent conference participant as a speaker, chairperson, and organizer at such events as Flash Memory Summit, OpenStack, and Container World. She is often quoted in a variety of publications including BusinessWeek, Investor’s Business Daily, the Los Angeles Times, CNET, Bloomberg, and Reuters. Ms. Bozman has also been VP/Principal Analyst at Hurwitz and Associates and Sr Product Marketing Manager at Sandisk. She earned a master’s degree from Stanford.

Tuesday, August 2nd
9:45-10:50 AM
CASE-101-2: Case Studies Session 2 (Case Studies Track)
Organizer + Chairperson: Tom Burniece, President, Burniece Consulting Services

Paper Presenters:
Session Description:
Coming soon..
About the Organizer/Moderator:
Tom Burniece is an independent business consultant with over 30 years of senior management experience in the networking and storage markets. He specializes in strategy formulation, business development, marketing, and due diligence. He has worked with well over 50 companies from unfunded startups to large public corporations, including venture and private equity firms. He is a highly experienced CEO and board member and has been a general manager with profit and loss responsibility for a billion-dollar division of Digital Equipment. Before becoming an independent consultant, he was also Chairman of Ciprico and a senior executive at Maxtor and Control Data. He holds a BEE from the University of Minnesota and an MSEE from Arizona State University. He is also a graduate of MIT’s Sloan Senior Executive Program.

Tuesday, August 2nd
9:45-10:50 AM
CLDS-101-2: Optimizing Clouds (Cloud Storage and Applications Track)
Paper Presenters:
Latency: Number 1 Metric for Modern Clouds
Boyan Krosnov, CTO, StorPool

Openstack cloud logmonitor service for infra insights and rapid troubleshooting
Vijila Navaraj, , Samsung Electronics

Cloud Storage Optimization using Compression & Deduplication
Tejas Chopra, Sr. Software Engineer, Netflix

Cloud Optimized Silicon Storage
Pichai Balaji, Director, Marvell

Session Description:
Coming soon..
About the Organizer/Moderator:
Tuesday, August 2nd
9:45-10:50 AM
DCTR-101-2: Enterprise Storage Part 2 (Data Center Applications Track)
Organizer + Chairperson: Howard Marks, Technologist Extraordinary, VAST Data

Paper Presenters:
Architecting Technology to Meet Tomorrow's Needs
Justin Emerson, Technology Evangelist, Pure Storage

Re-think the Design of RAID upon the Arrival of Computational Storage Drives
Jiangpeng Li, Director of Software Engineering, ScaleFlux

Diving in: Managing NVMe and NVMe-oF in the Enterprise
Richelle Ahlvers, Storage Technology Enablement Architect, Intel

Optimizing QoS for Enterprise Storage with SSD Performance Shaping
York Chen, Senior Enterprise Marketing Manager, Silicon Motion

Session Description:
Coming soon..
About the Organizer/Moderator:
Howard Marks has been writing, speaking, and consulting about enterprise technology for over thirty years. As a consultant, he has designed storage, server, and network infrastructures for organizations such as The State University of New York (Purchase), BBDO Worldwide, and the Foxwoods Resort Casino. He also operates an independent laboratory (DeepStorage) which tests storage products for both vendors and magazines. He started testing and reviewing products at PC Magazine in the late 1980s and has written hundreds of articles and product reviews for such media as Network World, Network Computing, and InformationWeek. A top rated speaker at industry events, he has spoken at Storage Decisions, Interop, and Microsoft’s TechEd. He has also developed training programs for organizations such as JP Morgan and American Express.

Tuesday, August 2nd
9:45-10:50 AM
EDGE-101-2: Edge/Cloud Storage - Issues and Challenges (Panel) (Edge Computing Track)
Moderator: Allen Samuels, , AWS

Panel Members:
Panelist: Peter Bisping, Senior Technologist, Data Center Platforms, Western Digital (WDC)

Panelist: Donpaul Stephens, CEO, AirMettle

Panelist: Chanson Lin, Founder/CEO, Embestor Technology

Session Description:
What is the current state of edge, cloud computing and is one segment more important/vital than the other? It is often said that the most current, most reliable data is located at the edge and if that is true how do we ensure it is safe, reliable and available to decision makers when and where it is needed. As processing gets pushed more toward the edge we need to simultaneously centralize it so it can be used to make fast, accurate decisions that effect the entire ecosystem. Where will the data exist in five years and do we really care as long as it is instantly available to the total ecosystem. Silos of data are being torn down as we level out the analysis/use of the information across the spectrum. Propriety of solutions will be rapidly replaced as we use storage as the tool to facilitate tomorrow's systems/solutions. Find out where you stand in the ecosystem of tomorrow and how you can be prepared to meet the needs that don't even exist...yet.
About the Organizer/Moderator:
Allen Samuels is an Engineering Fellow at Western Digital, where he helps direct the CTO office’s research into software and systems. He is a long-time leader in the open-source software community and has spoken at many open-source related events. He is a member of the Ceph Advisory Board and is heavily involved in the evolution of that critical open source technology in software-defined storage. Before joining Western Digital, he was a Chief Architect at Weitek and Citrix, and founded several companies including AMKAR Consulting, Orbital Data, and Cirtas Systems. He is a frequent speaker at conferences and other events, including Flash Memory Summit. He earned a BSEE from Rice University.

Tuesday, August 2nd
9:45-10:50 AM
FMAR-101-2: ZNS: An Endurance Architecture, Part 2 (Flash Memory Architectures Track)
Organizer + Chairperson: Brian Berg, President, Berg Software Design

Paper Presenters:
Reaching Petabyte-Scale Systems with ZNS SSDs
Javier Gonzalez, Principal Software Engineer, Samsung Electronics

Quick Realization of a ZNS SSD Using a Conventional SSD
Ganesh Guddanti, Principal Firmware Engineer, Micron Technology Operations India, Bangalore

Enabling an Optimal Application Ecosystem on ZNS Storage
Sanhita Sarkar, Global Director, Western Digital (WDC)

Session Description:
In 2020, the NVMe standard was expanded to include a Zoned Namespaces (ZNS) command set for use with SSDs, an effort which grew out of Open-Channel. ZNS allows an SSD to be able to perfectly align data to its flash media, resulting in expanded storage capacity, reduced write amplification and access latency, and thereby greater overall endurance of the SSD. This session will include talks that address various aspects of ZNS, including dealing with QLC media, testing a ZNS implementation, and gaining the full benefits of ZNS.
About the Organizer/Moderator:
Through his Berg Software Design consultancy, Brian provides hardware and software design and development services for storage and interface technologies in consumer electronics, including flash memory, NVMe and USB. Brian has been a developer, project lead, industry analyst, seminar leader, technical marketer and technical writer. He has participated in over 80 conferences as a speaker, session chair and conference chair. He has also worked extensively with intellectual property and patents, particularly in the storage arena. He is active as an IEEE officer and volunteer, including as past Chair of the Santa Clara Valley Section, Director and past Chair of the Consultants Network of Silicon Valley, Region 6 IEEE Milestone Coordinator, Chair of the SCV Technical History Committee, and past Liaison for the Women in Engineering Affinity Group. Brian is an IEEE awards recipient, including the 2017 Outstanding Leadership and Service to the IEEE within Region 6, the 2017 IEEE-USA Professional Leadership Award for Outstanding Service to the Consulting and Electrical Engineering profession, and the 2012 Outstanding Leadership and Professional Service Award for Region 6.

Tuesday, August 2nd
9:45-10:50 AM
INVT-101-2: Invited Talk with Debendra Das Sharma (Invited Talks Track)
Chairperson: Leah Schoeb, Sr. Developer Relations Manager, AMD

Paper Presenters:
Session Description:
High-performance workloads demand on-package integration of heterogeneous processing units, on-package memory, and communication infrastructure to meet the demands of the emerging compute landscape. AI, ML, data analytics, 5G, automotive, and high-performance computing are driving these demands to meet the needs of cloud computing, intelligent edge, and client computing infrastructure. On-package interconnects are a critical component to deliver the power-efficient performance with the right feature set in this evolving landscape. Universal Chiplet Interconnect Express (UCIe), is an open industry standard with a fully specified stack that comprehends plug-and-play interoperability of chiplets on a package, and which is similar to the seamless interoperability on board with off-package interconnect standards such PCI Express, Universal Serial Bus (USB), and Compute Express Link (CXL). This presentation will explore (1) usages and key metrics associated with different technology choices in UCIe, (2) the different layers and software models associated with UCIe along with the compliance and interoperability mechanisms, and (3) how UCIe will evolve to incorporate additional usage models in the future.
About the Organizer/Moderator:
Leah Schoeb is a Sr Developer Relations Manager in AMD's platform architecture team, where she engages with solid state storage vendors on storage technology futures. She has over 25 years of experience in the computer industry, and was previously Acting Director of Reference Architecture at Intel where she led a team of segment managers and architects managing cross functional teams for flash- and NVMe-based data solutions. Leah has held management and engineering positions at VMware, Dell, and Sun Microsystems, and was also a Senior Partner at the analyst firm Evaluator Group, where she focused on storage, virtualization, and cloud infrastructure. Leah has ten technical publications, and has presented at many technical conferences. Her MBA us from the Univ. of Phoenix, and heer BSEE is from the Univ. of Maryland, College Park.

Tuesday, August 2nd
9:45-10:50 AM
NVME-101-2: NVMe Command Sets and Transport Specification Overview (NVMe Track)
Session Sponsor: NVM Express
Chairperson + Speaker: Nick Adams, Principal Engineer, Intel

Organizer + Chairperson: Bill Martin, Principal Engineer SSD I/O Standards, Samsung Electronics

Paper Presenters:
An Overview of the Refactored NVMe Transport Specifications
Nick Adams, Principal Engineer, Intel

John Geldman, Director of SSD Industry Standards, KIOXIA
Curtis Ballard, , HPE
Refactoring NVMe creates Command Sets: NVMe Key Value and Zoned Namespaces
Bill Martin, Principal Engineer SSD I/O Standards, Samsung Electronics

Matias Bjorling, Distinguished Engineer and Country Manager, R&D Engineering, Western Digital (WDC)

Session Description:
NVMe refactored their specifications in 2022 to allow for better/quicker adoption of new features in NVMe. In this session learn about the refactored specification and the two new command sets that have been ratified, Zones Namespaces Command Set and Key Value Command Set.
About the Organizer/Moderator:
Nick Adams is a Platform Storage Architect in Intel’s Datacenter Group. In this role he drives strategy and innovation in the storage space. He is co-chair of the SNIA Computational Storage TWG and is an active participant within the NVMe Technical Working Group. Prior to his current role at Intel, Nick spent two years at Microsoft as a Director of SW/FW Engineering for the Surface team. Before that, Nick held various System FW Architecture, Management, and Development roles at Intel over the course of 16 years. Nick holds a Bachelor’s degree in Computer Engineering and a Master’s degree in Software Engineering, both from Portland State University. He has been issued 11 patents with 12 more pending in the areas of Computer System Firmware and Security

Bill has been involved in the storage industry for over 35 years serving on industry consortiums and standards bodies for storage including NVMe, SNIA, INCITS T10, INCITS T13, and INCITS T11. In addition to his role representing Samsung in SSD IO Standards, Bill currently holds the following industry leadership roles: Board member of the NVMe Board of Directors, co-chair of the NVMe Computational Programs Task Group, chair and editor for the NVMe KV Task Group, co-chair of the SNIA Technical Council, Chair of INCITS T10, Chair SNIA CMSI, Secretary of INCITS T13, editor of the SNIA Computational Storage Architecture Model, editor of the SNIA Computational Storage API, editor of the SNIA Key Value Storage API; editor of SCSI Block Commands – 5 (SBC-5), and author of numerous proposals to: NVMe, SNIA, INCITS T10, INCITS T13, and INCITS T11.

Tuesday, August 2nd
9:45-10:50 AM
SARC-101-2: Persistent Memory (System Architectures Track)
Session Sponsor: SNIA
Organizer + Chairperson: Willie Nelson, Technology Enabling Manager, Intel

Paper Presenters:
Accelerating Oracle Workloads on Intel DCPMM and Oracle PMEM Filestore on VMware
Sudhir Balasubramanian, Senior Staff Solution Architect & Global Oracle Practice Lead, VMware

Arvind Jagannath, Product Line Manager, VMWare
Sridhar Kayathi, , Intel
Requirements and Challenges Associated with the World's Fastest Storage Platform
Jeff Olivier, Software Engineer, Intel

Session Description:
Coming soon..
About the Organizer/Moderator:
Willie Nelson has been with Intel Corporation for over 23 years and is currently a Technology Enabling Manager, working with ecosystem partners to ensure new IO technologies are co-developed and ready for deployment by the industry. At SNIA, he is a member of the SNIA Compute, Memory, and Storage Governing Board, and is the SNIA liaison to the CXL Consortium.

Tuesday, August 2nd
9:45-10:50 AM
SPOS-101-2: MemVerge, Part 2: CXL Compatible Memory Getting Ready for Take-Off (Sponsored Sessions Track)
Session Sponsor: MemVerge
Organizer + Moderator: Frank Berry, VP Marketing, MemVerge

Panel Members:
Panelist: Ryan Baxter, Director Cloud & Verticals, Micron

Panelist: Uksong Kang, Vice President, DRAM Product Planning, SK hynix

Panelist: Jonathan Prout, Product Planning, Samsung Electronics

Session Description:
The goals of the full-day forum are to provide a 3600 view of development activity in the CXL ecosystem, and accelerate collaboration by sharing information about vendor technology partner programs. During this session, major CXL-compatible memory vendors who will describe their vision for their class of CXL-compatible technology, its impact on application use cases, and how other vendors can work with them to integrate your technology.
About the Organizer/Moderator:
Frank Berry is VP Marketing for MemVerge, a developer of enterprise-class memory virtualization software. He leads the company’s product marketing and market development efforts for products that are making persistent memory, storage at memory speeds, into a standard element in storage systems. A 30-year veteran of the storage industry, Frank has held senior engineering, sales, and marketing positions including VP Worldwide Marketing for Quantum and VP Product Marketing at QLogic. Frank is a popular conference speaker and has written hundreds of analyst reports, blogs, and feature articles.

Tuesday, August 2nd
9:45-10:50 AM
SSDS-101-2: ECC and Machine Learning (SSD Technology Track)
Organizer + Chairperson: Nedelijo Varnica, Senior Distinguished Engineer, Marvell

Paper Presenters:
Generalized Integrated Interleaved Codes for Hyper-Speed Memories
Xinmiao Zhang, Associate Professor, Ohio State University (ECE Department)

Advanced NAND Management Using Machine Learning (ML)
Ramyakanth Edupuganti, Staff Applications Engineer, Microchip

A high-performance low-power multi-rate 4K LDPC codec for 3D TLC and QLC Flash
Tisheng Chen, Co-founder & CEO, EigenBit

Improving hard-decoding ECC with irregular LDPC codes free of error floor
David Declercq, CTO, CodeLucida

Session Description:
Coming soon..
About the Organizer/Moderator:
Coming soon..

Tuesday, August 2nd
3:20-4:25 PM
BMKT-102-1: Industry Trends (Business Strategies and Memory Markets Track)
Organizer + Chairperson: Jean Bozman, President, Cloud Architects Advisors

Paper Presenters:
Chip shortage, dynamics & outlook - a Si technology & Supply Chain perspective
Jung Yoon, Distinguished Engineer and CTO, Supply Chain, IBM

Overcoming Obstacles to the 4th Industrial Revolution with Flash-Native Storage
Hari Kannan, MTS, Pure Storage

Emerging Non-Volatile Memory - A 2022 Market Update
Simone Bertolazzi, Technology and Market Analyst, Yole Dveloppement

Session Description:
Coming soon..
About the Organizer/Moderator:
Jean S. Bozman is President of Cloud Architects Advisors, a market research and consulting firm focused on hardware and software for enterprise and hybrid multi-cloud computing. She analyzes the markets for servers, storage, and software related to datacenters and cloud infrastructure. A highly-respected IT professional, she has spent many years covering the worldwide markets for operating environments, servers, and server workloads. She was a Research VP at IDC, where she focused on the worldwide markets for servers and server operating systems. She is a frequent conference participant as a speaker, chairperson, and organizer at such events as Flash Memory Summit, OpenStack, and Container World. She is often quoted in a variety of publications including BusinessWeek, Investor’s Business Daily, the Los Angeles Times, CNET, Bloomberg, and Reuters. Ms. Bozman has also been VP/Principal Analyst at Hurwitz and Associates and Sr Product Marketing Manager at Sandisk. She earned a master’s degree from Stanford.

Tuesday, August 2nd
3:20-4:25 PM
CIND-102-1: Automotive Applications: The Smart Environment (Panel) (Consumer and Industrial Applications Track)
Chairperson + Speaker: Greg Basich, Associate Director, Automotive Infotainment and Telematics and Connected Mobility Services, Strategy Analytics

Panel Members:
Speaker: Michael Burk, Principal Architect - Automotive, Micron Technology

Speaker: Sandeep Krishnegowda, Sr Director of Marketing and Applications, Infineon Technologies

Speaker: Bernd Niedermeier, Head of Automotive business develop, Tuxera

Speaker: Melissa Clark, Researcher, Caltran

Session Description:
Coming soon..
About the Organizer/Moderator:
Greg Basich is the Associate Director with Strategy Analytics’ Automotive Infotainment & Telematics service and the company’s Automotive Connected Mobility service. He has been with Strategy Analytics for more than 8 years after a previous 13-year career as a business-to-business automotive journalist. At Strategy Analytics, Greg focuses on a number of topics, including connected car technologies and business models, automotive infotainment, mobility services, such as car sharing and ride hailing, and automotive cyber security.

Tuesday, August 2nd
3:20-4:25 PM
CLDS-102-1: Cloud Storage Technologies (Cloud Storage and Applications Track)
Organizer + Chairperson: Barry Hoberman, , Consultant

Paper Presenters:
Solving Datacenter Boot SSD Challenges
Karthik Shivaram, Storage Engineer, Facebook

100x Faster Analytics from Reliable Computational Storage
Donpaul Stephens, CEO, AirMettle

Designing Granular Lifecycle Management for the Cloud
Tejas Chopra, Sr. Software Engineer, Netflix

Disaster Recovery in a Hybrid Cloud Environment
Kyle Grossmiller, Sr. Solutions Architect, Pure Storage

Session Description:
Coming soon..
About the Organizer/Moderator:
Barry Hoberman is an independent consultant focused on MRAM and other emerging memory technologies. He specializes in overcoming the challenges of moving from technology development to manufacturing. Involved with MRAM for over 10 years, he served as CEO/Chairman of startup Spin Transfer Technologies (STT), which is developing an advanced technology based on a proprietary writing technique. He also was CMO at startup Crocus Technology. He has been an MRAM spokesperson at many private, government, educational, and industry forums (including Flash Memory Summit), addressing market opportunities, manufacturing yields, and tradeoffs among performance, retention, and endurance. He previously led semiconductor IP companies as founder/CEO at both inSilicon (communications and I/O technology, acquired by Synopsys) and Virtual Silicon (embedded memory and libraries, acquired by Mosys). He holds a BSEE from MIT and over 20 US patents. He has over 35 years experience in the semiconductor industry with a focus on memory technology.

Tuesday, August 2nd
3:20-4:25 PM
DCTR-102-1: Hyperscale Applications (Data Center Applications Track)
Organizer + Chairperson: Jonathan Hinkle, Principal Researcher, Lenovo

Paper Presenters:
Flash Induced Latency at Scale
Vineet Parekh, Hardware Systems Engineer, Facebook

Looking to the Future: What Hyperscale Cares About
Ross Stenfort, Storage Engineer, META

Session Description:
Coming soon..
About the Organizer/Moderator:
Jonathan Hinkle is Executive Director and Distinguished Researcher of System Architecture at Lenovo, where he creates and helps foster adoption of new data center systems architectures and technologies. Jonathan is an industry leading technical expert in memory, storage devices, and data center systems architecture with over 20 years of experience. In the JEDEC standards organization, Jonathan serves on the Board of Directors, is Vice-Chair of Marketing and Chairs the Hybrid DIMM Task Group standardizing NVDIMMs. He also invented and drove first development of the EDSFF 1U Short (E1.S) NVMe drive, VLP DIMM and the NVDIMM Persistent Memory. He has over 30 patents granted or pending and earned BS and MS degrees in Computer Engineering from North Carolina State University.

Tuesday, August 2nd
3:20-4:25 PM
EDGE-102-1: Driving Force for Edge/Cloud Computing (Panel) (Edge Computing Track)
Organizer + Moderator: Andy Marken, President, Marken Communications

Panel Members:
Panelist: Marko Noack, Member of Technical Staff, Ferroelectric Memory

Panelist: Yasuhiro Taniguchi, CTO, Floadia

Panelist: Shankar Natarajan, Principal Engineer, Solidigm

Session Description:
Whether systems/processes work autonomously or are managed/manipulated by individuals the one thing we know is that the more data we have, the more we need/want. What is driving the dramatic lust for information and how do we store, departmentalize, analyze the data so that it can be quickly, reliably be used to make not just good decisions but the right decisions. We have almost reached the point in the industry where we have the capacity to store all of the information that is created but we need solutions that help quickly, effectively store the right data we need right now and retain the other information for analysis and use in other areas/applications. Everything can be captured but can/should everything be saved and used...find out where storage will be most widely used/needed in our everchanging ecosystem.
About the Organizer/Moderator:
Andy Marken is the president of Marken Communications, a marketing consulting and communications agency. For over 25 years, he has worked with leading national and international content development, information, and storage firms. Andy has written over 200 articles on management, marketing, and communications. He is also a widely quoted and recognized insider commentator and interpreter of personal computer/consumer electronics (PC/CE) industry trends and activities.

Tuesday, August 2nd
3:20-4:25 PM
FMAR-102-1: Endurance Alternatives to ZNS, Part 1 (Flash Memory Architectures Track)
Organizer + Chairperson: Brian Berg, President, Berg Software Design

Paper Presenters:
Improving Wear Leveling on Android Smartphones
Tejas Chopra, Sr. Software Engineer, Netflix

Managed NAND Storage Endurance Challenges in Enterprise Class Mobile Computers
Mihai Adam, Electrical Engineer Principal, Zebra Technologies

Key-Value SSDs: Why They Are Superior to Zoned Namespaces
Andy Tomlin, Architect, QiStor

Overcoming NAND Limitations with a Layered SSD FW Architecture
David Wang, Director, Enterprise SSD Firmware, Silicon Motion

Session Description:
Note everyone is convinced that Zoned Namespaces (ZNS) is the optimal approach for greater SSD endurance. This session will include talks that address Key-Value Store SSDs, layered architectures, the wholly different environment of the use of flash in cell phones, and other topics related to greater endurance using methods other than ZNS.
About the Organizer/Moderator:
Through his Berg Software Design consultancy, Brian provides hardware and software design and development services for storage and interface technologies in consumer electronics, including flash memory, NVMe and USB. Brian has been a developer, project lead, industry analyst, seminar leader, technical marketer and technical writer. He has participated in over 80 conferences as a speaker, session chair and conference chair. He has also worked extensively with intellectual property and patents, particularly in the storage arena. He is active as an IEEE officer and volunteer, including as past Chair of the Santa Clara Valley Section, Director and past Chair of the Consultants Network of Silicon Valley, Region 6 IEEE Milestone Coordinator, Chair of the SCV Technical History Committee, and past Liaison for the Women in Engineering Affinity Group. Brian is an IEEE awards recipient, including the 2017 Outstanding Leadership and Service to the IEEE within Region 6, the 2017 IEEE-USA Professional Leadership Award for Outstanding Service to the Consulting and Electrical Engineering profession, and the 2012 Outstanding Leadership and Professional Service Award for Region 6.

Tuesday, August 2nd
3:20-4:25 PM
INVT-102-1: Invited Talk with Andy Walls (Invited Talks Track)
Chairperson: Leah Schoeb, Sr. Developer Relations Manager, AMD

Paper Presenters:
Computational Storage: Compelling Usecases Now and in the Future
Andrew Walls, IBM Fellow, CTO FlashSystem, IBM

Session Description:
Computational Storage Devices have been deployed widely in usecases where context about the data is not needed. Low latency compression is a good example of an offload requiring little to no context. The result is excellent data reduction at very high performance with low CPU utilization on the controllers. RAID or Erasure Code acceleration is another example of assists that can be done without knowing much about the data. There are some other intriguing Storage Controller functions that can be offloaded at a block level with little metadata information. With some information about the data, the potential for offload is extremely interesting. Even with high performance SSDs, the amount of bandwidth that can be read and fed into controllers or applications is a fraction of the NAND read bandwidth available. Therefore, scanning, search, filtering engines can be run in line or in the background providing an efficient use of precious storage network bandwidth. This talk will discuss these and future accelerators that make the use of CSDs very compelling. Come listen to a well-known expert in the field of high performance storage discuss the future of computational storage inside SSDs.
About the Organizer/Moderator:
Leah Schoeb is a Sr Developer Relations Manager in AMD's platform architecture team, where she engages with solid state storage vendors on storage technology futures. She has over 25 years of experience in the computer industry, and was previously Acting Director of Reference Architecture at Intel where she led a team of segment managers and architects managing cross functional teams for flash- and NVMe-based data solutions. Leah has held management and engineering positions at VMware, Dell, and Sun Microsystems, and was also a Senior Partner at the analyst firm Evaluator Group, where she focused on storage, virtualization, and cloud infrastructure. Leah has ten technical publications, and has presented at many technical conferences. Her MBA us from the Univ. of Phoenix, and heer BSEE is from the Univ. of Maryland, College Park.

Tuesday, August 2nd
3:20-4:25 PM
NVME-102-1: NVM Express Technology Innovations (NVMe Track)
Session Sponsor: NVM Express
Chairperson + Speaker: Dave Landsman, Director of Industry Standards, Western Digital (WDC)

Organizer + Chairperson: KIm Malone, Storage Software Architect, Intel

Paper Presenters:
Expanding NVMe Technology to New Media Types: Rotational Media and More
Dave Landsman, Director of Industry Standards, Western Digital (WDC)

David Allen, Sr Director Product Marketing, Seagate
NVMe Computational Storage - An Update on the Standard
Kim Malone, Storage Software Architect, Intel

Session Description:
Coming soon..
About the Organizer/Moderator:
Dave leads Western Digital’s storage interface standards activities spanning SSDs, HDDs, removable cards, and memory interconnect. He has been involved with NVMe since 2011 and a member of the NVMe board of directors since 2012, contributing to the evolution of NVMe features for mobile/client, zoned storage, and more. He has participated actively in many storage and memory standards over the past 14 years, including NVMe/PCIe, SCSI/SATA, SD/CF, and NAND interface. Dave holds a bachelor’s degree in computer science from the University of California San Diego.

Coming soon..

Tuesday, August 2nd
3:20-4:25 PM
SARC-102-1:Application Acceleration (PRO) (System Architectures Track)
Session Sponsor: SNIA
Organizer + Moderator: Willie Nelson, Technology Enabling Manager, Intel

Paper Presenters:
Accelerating Database Caching and Query with SmartSSD CSDs
Alex Paek, Database Solutions Architect, AMD

Empowering Real-Time Decision Making for Large-Scale Datasets w SSD like Econ
Prasad Venkatachar, Solutions Director, Pliops

Computational Storage: Leveraging eFPGAs for Application Acceleration
Ralph Grundler, Sr. Director Technical Marketing, FlexLogix

Methodologies to Enterprise Storage Architectures
Brent Yardley, STSM, IBM

Session Description:
Coming soon..
About the Organizer/Moderator:
Willie Nelson has been with Intel Corporation for over 23 years and is currently a Technology Enabling Manager, working with ecosystem partners to ensure new IO technologies are co-developed and ready for deployment by the industry. At SNIA, he is a member of the SNIA Compute, Memory, and Storage Governing Board, and is the SNIA liaison to the CXL Consortium.

Tuesday, August 2nd
3:20-4:25 PM
SPOS-102-1: MemVerge, Part 3: CXL Memory Software Platforms Getting Ready (Sponsored Sessions Track)
Session Sponsor: MemVerge
Organizer + Moderator: Frank Berry, VP Marketing, MemVerge

Panel Members:
Panelist: Charles Fan, Co-founder & CEO, MemVerge

Panelist: Manoj Wadekar, Storage Architect, Facebook

Panelist: Arvind Jagannath, Product Line Manager, VMWare

Session Description:
The goals of the full-day forum are to provide a 3600 view of development activity in the CXL ecosystem, and accelerate collaboration by sharing information about vendor technology partner programs. During this session, major memory software platform vendors and open-source organizations will describe their vision for tiering and fabric management, its impact on application use cases, and how other vendors can work with them to integrate your technology.
About the Organizer/Moderator:
Frank Berry is VP Marketing for MemVerge, a developer of enterprise-class memory virtualization software. He leads the company’s product marketing and market development efforts for products that are making persistent memory, storage at memory speeds, into a standard element in storage systems. A 30-year veteran of the storage industry, Frank has held senior engineering, sales, and marketing positions including VP Worldwide Marketing for Quantum and VP Product Marketing at QLogic. Frank is a popular conference speaker and has written hundreds of analyst reports, blogs, and feature articles.

Tuesday, August 2nd
3:20-4:25 PM
SSDS-102-1: Ethernet SSDs Part 1 (Panel) (SSD Technology Track)
Organizer + Moderator: Hrishikesh Sathawane, Director of Product Planning, Samsung Semiconductor

Panel Members:
Panelist: Ed Fiore, VP/Chief System Architect, NetApp

Panelist: Grant Mackey, Sr. Technologist, Western Digital (WDC)

Panelist: Rob Davis, VP Storage Technology - Networking Business Unit, NVIDIA

Panelist: Mark Carlson, Principal Engineer, KIOXIA

Session Description:
Ethernet-SSDs can support NVMe over Ethernet, but where is the technology today? What is E-SSD and its different implementations? What are the perspectives from various players in this evolving eco-system? Where is the standardization process? What are the critical components? What are the deployment models and end user benefits of this technology? Let's explore all these questions. Bring your own questions and join the conversation with our panel of experts.
About the Organizer/Moderator:
As a Dir of Product Planning @ Samsung’s path finding group, Hrishi drives growth for Samsung by fostering innovation and building strategy around new markets/product concepts/business models. He has 20 years of experience in the storage industry that spans from engineering, strategy to marketing in functional roles and electric vehicles, flash arrays to hard drives in terms of technology. Hrishi has spoken on Automotive storage at prior FMS and one of the products he drove, BGA SSD won the most innovative product award at FMS. Hrishi has MBA from UCLA Anderson, MS in Electrical engineering from Iowa State, and B.Tech in Engineering Physics from IIT-Bombay. He is also on the board of 15K+ strong IIT-BayArea Alumni organization and is leading partnership outreach for The Indus Entrepreneurs’ annual conference called TiEcon.

Tuesday, August 2nd
4:35-5:40 PM
CIND-102-2: Automotive Applications: Vehicle Storage - Panel (Consumer and Industrial Applications Track)
Moderator: Michael Huonker, Architect Infotainment, Daimler

Panel Members:
Panelist: Crystal Chang, Senior Manager, ATP Electronics

Panelist: Bill Gervasi, Principal Systems Architect, Nantero

Speaker: Bill Gervasi, Principal Systems Architect, Nantero

Panelist: Steve Shih, Project Manager, Silicon Motion

Session Description:
Coming soon..
About the Organizer/Moderator:
Michael Huonker works in the Architecture & Advanced Engineering group for infotainment systems at Mercedes-Benz. He has over 15 years’ experience in automotive and storage technology. Michael is working on new infotainment platforms, developed automotive displays for large OEMs, did IC Design for BluRay SoC circuits and wrote the optical servo firmware for the Xbox. Before joining Daimler AG he was at Harman Becker Automotive and Thomson Multimedia. Mr. Huonker holds 7 patents in the field of storage technology. He has a BS in Electrical Engineering from Furtwangen University and a Master in Optics from Hagen University.

Tuesday, August 2nd
4:35-5:40 PM
FMAR-102-2: Endurance Alternatives to ZNS, Part 2 (Flash Memory Architectures Track)
Organizer + Chairperson: Tejas Chopra, Sr. Software Engineer, Netflix

Paper Presenters:
Reducing Solid-State Drive Read Latency by Optimizing Read-Retry
Jisung Park, Senior Researcher and Leturer, ETH Zürich

Session Description:
Note everyone is convinced that Zoned Namespaces (ZNS) is the optimal approach for greater SSD endurance. This session will include talks that address Key-Value Store SSDs, layered architectures, the wholly different environment of the use of flash in cell phones, and other topics related to greater endurance using methods other than ZNS.
About the Organizer/Moderator:
Tejas Chopra is a Sr. Software Engineer at Netflix, where he works on the Storage infrastructure for Netflix Studios. He is a TedX and an international keynote speaker with talks on Blockchain, Storage, Web3.0, Cloud computing, and Engineering culture. He has over a decade of experience working on distributed systems, and has a Masters in Electrical and Computer Engineering from Carnegie Mellon University.

Tuesday, August 2nd
4:35-5:40 PM
DCTR-102-2: Hyperscale Technologies (Data Center Applications Track)
Organizer + Chairperson: Justin Heindel, VP, Head of Cloud Specialized Systems, Pure Storage

Paper Presenters:
Balancing Performance and Spend in the Public Cloud
Kyle Grossmiller, Sr. Solutions Architect, Pure Storage

TORmem's Disaggregated Memory Appliance
Steven White, CTO, TORmem

Accelerating AI and Hyperscale Computing with PCIe 5.0 Switches
Tam Do, Manager, Microchip

Session Description:
Coming soon..
About the Organizer/Moderator:
Justin Heindel is a VP at Pure Storage, where he leads business development and product for the cloud and hyperscale segment. Justin has over 20 years of marketing, business development and engineering leadership experience in storage, semiconductors, and medical technology. Prior to Pure, Justin was VP of Marketing & BD at CNEX Labs, a leading provider of enterprise and data center SSD controllers, SSD solutions, and storage accelerators. Justin was also an executive at Marvell, where he was member of a core team that drove the company from pre-IPO to the Fortune 500, and was involved in its HDD, SSD, RAID controller, storage connectivity, and optical storage businesses. Justin has been a committee member for numerous storage standards initiatives and held chair positions for the Denali and CE-ATA work groups. Justin holds a Bachelor of Science degree from Cornell University and has been granted one US patent.

Tuesday, August 2nd
4:35-5:40 PM
INVT-102-2: Invited Talk with Bob Thibadeau (Invited Talks Track)
Paper Presenters:
Flashy Crypto: A Storage OEM View
Robert Thibadeau, Chairman/CEO, Drive Trust Alliance

Session Description:
The TCG Self-Encrypting Drive core specifications provide optional features that help define how to solve the problem of losing the credentials to establish or transfer cryptocurrency ownership or NFT ownership. The basic method is to allow secure storage and tunneled distributed synchronization across separate self-protecting flash and hard drives. So, losing one USB drive in the swarm of diverse self-protecting storage devices, for example, is not catastrophic. This is whether any stipulated subset of the storage device security swarm got accidentally thrown away or, even, was stolen. The operations would be universal across cryptocurrencies and types of NFT and would protect in each self-protecting storage device all the additional evidence and history surrounding the basic authentication and key operations no matter the computing environment in which these devices are operated out of. So, for example, the NFT content is, itself, protected from unauthorized viewing.
About the Organizer/Moderator:
Tuesday, August 2nd
4:35-5:40 PM
NVME-102-2: NVM Express Technology Updates: Discovery Automation and Drivers (NVMe Track)
Session Sponsor: NVM Express
Chairperson + Speaker: Uma Parepalli, Servers and Storage Architect, Self-Employed

Chairperson: Bill Lynn, Distinguished Engineer, Dell

Paper Presenters:
Discovery Automation for NVMe IP-Based SANs
Curtis Ballard, Technologist, HPE

NVM Express Software Drivers Update
Uma Parepalli, Servers and Storage Architect, Self-Employed

Lee Prewitt, Principal Hardware Program Manager, Microsoft
Murali Rajagopal, , VMware

Session Description:
Coming soon..
About the Organizer/Moderator:
Uma Parepalli is an expert in Servers and Storage including UEFI Platform Firmware and Device Drivers, NVMe SSDs, and a contributor participant to various industry standards specifications including UEFI, ACPI and NVMe. Uma’s many first in the industry technical contributions include enabling NVMe SSDs from any vendors to work seamlessly on any BIOS, OS, Processor and Desktop/Server platforms seamlessly. Uma is currently working on a software startup and previously worked for Marvell, SK Hynix, LSI, Dell EMC, Intel and other global industry leaders in various senior level architecture and management capacities from principal engineer/architect to global head of engineering, program, and product management roles. Uma is a chair and speaker for NVMe Device Drivers & Driver Eco-System and other sessions at FMS over the years.

Coming soon..

Tuesday, August 2nd
4:35-5:40 PM
OMEM-102-2: New/Emerging Memories Part 1 (Other Memory Technologies Track)
Paper Presenters:
Technology Insights: Emerging Memory 2022 and Beyond
Jeongdong Choe, Senior Technical Fellow, TechInsights

What the Future Holds for Emerging Memory Technologies
, ,

Session Description:
Coming soon..
About the Organizer/Moderator:
Tuesday, August 2nd
4:35-5:40 PM
SARC-102-2: Open Memory Interface (OMI) (System Architectures Track)
Session Sponsor: SNIA
Organizer + Chairperson: Allan Cantle, CEO, Nallasway

Panel Members:
Speaker: Baba Arimilli, STSM, IBM

Speaker: Andreas Grapentin, Researcher, Hasso-Plattner-Institute for Digital Engineering gGmbH

Speaker: Pekon Gupta, Solutions Architect, SMART Modular Technologies

Panelist: Larrie Carr, VP Engineering, Rambus

Panelist: Bill Stark, Distinguished Engineer, IBM

Session Description:
This Session has 3 presentations and a Panel Session that introduce the Open Memory Interface as a Local Memory Serial Bus to replace the traditional DDRx Memory bus. The presentations also outline the the use of OMI in production implementations and the Panel Session will discuss whether the traditional hangups on the parallel to serial transition of the Local memory bus are still relevant or not.
About the Organizer/Moderator:
Allan Cantle is CEO of Nallasway, consulting on Heterogeneous, High Performance Computing Solutions. He is currently contracting with the OpenCAPI Consortium as the Technical Director and Board Advisor. He also volunteers as the Technical Lead for the OCP HPC SubProject. Previously, Allan was the founder of Nallatech, which, during his 25 year tenure, became widely known as a pioneer in FPGA Accelerated Computing. Before founding Nallatech; Allan was an Electronics Systems Engineer at BAE systems, developing real-time heterogeneous high-performance computers. He holds a BEng degree in Electrical and Electronics Engineering from the University of Plymouth and an MSc in Corporate Leadership.

Tuesday, August 2nd
4:35-5:40 PM
SPOS-102-2: MemVerge, Part 4: Panel: Composable Infrastructure Migration (Sponsored Sessions Track)
Session Sponsor: MemVerge
Organizer + Moderator: Chris Mellor, Editor, Blocks and Files

Panel Members:
Panelist: Ben Bolles, Executive Director Product Management, Liqid

Panelist: Matt Demas, Field CTO, GigaIO

Panelist: Richard Solomon, Technical Marketing Manager PCIe/CXL, Synopsys

Panelist: Gerry Fan, CEO and Founder, Xconn

Panelist: Bernie Wu, VP Strategic Alliances, MemVerge

Session Description:
The goals of the full-day forum are to provide a 3600 view of development activity in the CXL ecosystem, and accelerate collaboration by sharing information about vendor technology partner programs. During this session, Chris Mellor, Editor of Blocks and Files, will moderate a panel consisting of composable infrastructure vendors. They will discuss how they will move their technology onto CXL and the collaboration with other vendors that is needed. The second session is panel of end-users and cloud SaaS vendors who will discuss how peta-scale memory, that is made possible by CXL, will change the way applications are built and used.
About the Organizer/Moderator:
Coming soon..

Tuesday, August 2nd
4:35-5:40 PM
SSDS-102-2: Ethernet SSDs Part 2 (SSD Technology Track)
Organizer + Moderator: John Geldman, Director of SSD Industry Standards, KIOXIA

Paper Presenters:
Advantages of Ethernet SSDs in AI Applications
Rob Davis, VP Storage Technology - Networking Business Unit, NVIDIA

EBOF/Ethernet SSD Use Cases
Khurram Malik, Director of Product Marketing, Marvell

Managing Ethernet-Attached Drives Using SNIA Swordfish
Richelle Ahlvers, Storage Technology Enablement Architect, Intel

Session Description:
Coming soon..
About the Organizer/Moderator:
John Geldman is Director SSD Industry Standards at Toshiba Memory. He focuses on standards for cloud storage, HDD and SSD storage devices, data security, and persistent (storage class) memory. His previous standards committee engagements include INCITS T10 and T13, NVMe, PCI-SIG, SATA-IO, TCG, SFF, SNIA, OSF, OCP, and JEDEC. He is well-known as a storage interface leader adept at guiding standards organizations and architecting groundbreaking technical developments. His specialties include SSD architecture, IP development, storage security, and storage card products. He was previously Director Industry Standards at Micron, where he led the company’s participation in such standards bodies as T10, T13, SATA, IEEE 1667, USB, CompactFlash, and the SD Association. He has also worked for Brecis Communications, Basis Communications, and Cirrus Logic. He holds 9 patents and has been recognized for his standards work by the SD Association and INCITS. A frequent blogger and conference contributor, he has been a speaker, organizer, and chairperson at Flash Memory Summit, as well as being a member of the Conference Advisory Board. He holds an MSCS from Santa Clara University and a BSECE from Clarkson University.

Tuesday, August 2nd
7:30-9:30 PM
FMS 2022 Chat with the Experts (Chat with the Experts Track)
Organizer + Chairperson: Jay Kramer, President, Network Storage Advisors

Paper Presenters:
Session Description:
This popular annual session at Flash Memory Summit is your chance to network in person with industry leaders in the major technology segments of the Flash industry. Come prepared with your questions, grab some food and beverage, and find a table or tables that meet your interests!
About the Organizer/Moderator:
Jay Kramer is a world recognized technology consultant specializing in training and delivering marketing services for the network storage industry. He has personally trained over 2000 professionals on storage networking, and he currently works with leading and emerging storage product companies worldwide. Jay has been VP Worldwide Marketing and Product Management for many storage companies including Sepaton (acquired by HDS), Astute Networks, iStor Networks, Infinity I/O, Maxtor, and Creative Design Solutions. He also has long experience in marketing and strategic planning at Unisys. An industry leader, he has served on the Board of Directors of the Fibre Channel Industry Association (FCIA) and was one of the Founders of the Flash Memory Summit. Jay has chaired SNIA committees and was a driving force in launching the first open systems SAN Certification Program, thus creating a career path for storage professionals. He has also been a featured speaker at industry conferences and has published articles and white papers on network storage, cloud storage, storage virtualization, data protection, and software defined storage. He is a graduate of Syracuse University’s Whitman School of Management with dual degrees in Marketing and Finance.