Paper Title: Using a Simulation Model to Optimize UCIe Implementations

Paper Abstract: UCIe has become a popular standard for interconnecting dies within a package. A simulation model is essential for optimizing implementations. For example, a new tool, Chiplet PHY Designer, generates an electrical simulation model for die-to-die (D2D) PHY IP. A demonstration project takes the foundational aspects of the UCI electrical interface and uses them to generate a model based on the tool. It thus provides a practical example of how the electrical performance of a D2D link can be captured through simulation. The simulation allows designers to optimize UCIe implementations and take full advantage of the technology.

Paper Author: Hee-Soo Lee, High-Speed Design Lead, Keysight Technologies International
Adrian Auge, Sr Staff Signal Integrity Engineer, Alphawave Semi
Fangyi Rao, Master R&D Engineer, Keysight Technologies

Author Bio: Hee-Soo Lee is the High-Speed Design Lead at Keysight, where he works on electromagnetic and circuit simulations. He also covers DDR/SerDes products. He has 15 years experience with simulation models of high-speed circuits. He earned a BSEE from Korea Aerospace University, has written articles for Signal Integrity Journal, and has presented at webinars and at conferences including DesignCon.

Author 2 Bio: Adrien Auge is a Sr Staff Signal Integrity Engineer at Alphawave Semi, where he works on providing accurate signal models to customers. He previously worked at Intel, SK Hynix, and Synopsys on memory and interface design and models. He has presented papers at DesignCon and won a Best Paper Award for a presentation on PCIe models. He is also active in the IBIS Open Forum. He earned an MSEE from KAIST (Korea).

Author 3 Bio: Fangyi Rao is a master R&D engineer at Keysight Technologies, where he works on analog/RF and signal integrity simulation. Before joining Keysight, he worked at Cadence on nonlinear circuit analysis. He has 7 publications in refereed journals and conferences, including IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) where he received a best paper award. He holds 20 patents and earned a PhD in physics from Northwestern University.