Paper Title: UCIe Reaches a First Step in Interoperability

Paper Abstract: Multi-die systems require a high-speed local die-to-die interface. Several candidates have emerged, and an initial key test is whether their standard implementation is clear and complete enough to allow for interoperability between designs from different vendors. UCIe (Universal Chiplet Interconnect Express) has now undergone initial interoperability tests using Synopsys UCIe IP on TSMC N3 process and Intel UCIe IP on Intel 3 technology. The results are favorable and show major progress toward achieving fast heterogenous integration of multi-die systems.

Paper Author: Manuel Mota, Sr Product Manager, Synopsys

Author Bio: Manuel Mota is a Senior Product Manager for Synopsys High-Speed Interface IP including UCIe. He has focused recently on multi-die systems and has published articles on UCIe in such journals as Embedded Computing Design and Semiconductor Engineering. He has also given presentations at Chiplet Summit and SNUG. Before joining Synopsys, Manuel worked at MIPS Technologies. He earned a PhD in Electronic Engineering from Lisbon Technical University (Portugal).