Thursday, June 15th
02:00-3:20 PM
A-202: Application Acceleration 1 - Special Workloads (Application Acceleration Track)
Paper Title: SmartNICs and DPUs Accelerate HPC Solutions

Paper Abstract: HPC applications are always hungry for more processor cycles. Adding to this perpetual demand is the increased use of AI/ML and the ever-growing need for data security (particularly among government customers). SmartNICs and DPUs are a great way to offload overhead, such as packet analysis, encryption/decryption, and deep packet inspection, as well as HPC-specific tasks such as MPI (message-passing interface). Recent experiments show performance benefits over many workloads and lower total cost of ownership for large-scale HPC deployments.

Paper Author: Scot Schultz, Sr Director - HPC & Technical Computing, NVIDIA

Author Bio: Scot Schultz is an HPC technology specialist with a focus on Artificial Intelligence and Machine Learning systems. Schultz has broad knowledge in distributed computing, operating systems, AI frameworks, high speed interconnects and microprocessor technologies. Throughout his career, with more than 30 years of experience in high-performance computing systems, his career has included engineering and leadership roles, including strategic HPC technology ecosystem enablement. Scot also has been instrumental with the development and adoption of numerous industry-standards organizations.