Wednesday, January 25th
04:30-5:30 PM
A-103: Design - 1 (Design/Packaging/Interfaces/Applications Track)
Paper Title: Energy-Centric AI Acceleration with Chiplet Based Design

Paper Abstract: Energy efficiency remains an important topic in leading-edge chip design. Large chips generally consume a lot of power, leading to high energy bills and the need for more expensive cooling equipment. One way to reduce energy usage is to look for ways to store data near the processing elements that will analyze it, thus avoiding large transfers. For example, processors and accelerators can both be chiplets with data being transferred on a chiplet interconnect rather than the server buses that use a lot more energy. Experiments have shown a 1 to 2 orders of magnitude savings. In the future, we could see a variety of both processors and accelerators being available on a drop-in basis, and designers would be able to mix and match them for the most energy-efficient implementation for a specific application.

Paper Author: Robert Beachler, VP Product, Untether AI

Author Bio: Robert (Bob) Beachler is VP Product at Untether AI, a company focused on devising chips that implement neural networks more efficiently through new memory architectures. Bob focuses on translating technology into compelling products and driving revenue. A long-time leader in the FPGA business, he has been a senior executive with both industry leaders such as Altera and Xilinx, and with innovative startups. He has a long record of developing and marketing groundbreaking products. In his 30+ years of industry experience, he has written many articles and given many presentations (most recently at Hot Chips and the Linley Processor Conference), He is often quoted in the trade and technical press. He earned a BSEE from Ohio State University.