Paper Title: Chiplet-Based Image Processor for Wide-Area Surveillance

Paper Abstract: Image processing for wide-area surveillance is an excellent application for chiplet-based design, since it involves large amounts of streaming data and many complex processing algorithms. Our new 2.5D nano-Abacus architecture applies accelerated computing, hardware AI inference, and machine learning to tackle the problem. It consists of a silicon interposer, a 3D memory stack, a host FPGA, and three computational chiplets. Each chiplet, by itself a 128 core multiprocessor, maps the algorithmic pipeline to a set of cores/ processing units from a library intended for pre-processing, segmentation, tracking, object attribute extraction, and classification. The architecture exploits the temporal structure of the video streams. The chiplets include two networks on chip as well as a memory interface and a general-purpose I/O port. The networked approach allows us to easily increase future throughput by simply adding more chiplets. Applying the nano-Abacus to standard imaging benchmarks shows that it provides supercomputer-class performance at a small fraction of the cost and power consumption.

Paper Author: Andreas Andreou, Professor, Johns Hopkins University

Author Bio: Andreas Andreou is a Professor of Electrical and Computer Engineering at Johns Hopkins University, where he is the cofounder of the Center for Language and Speech Processing. His research achievements include a contrast-sensitive silicon retina, the first CMOS polarization sensitive imager, silicon rods in standard foundry CMOS for single photon detection, hybrid silicon/silicone chip-scale incubator, and a large scale mixed analog/digital associative processor for character recognition. He has almost 500 publications in such journals as Neural Networks, Learning and Perception, IEEE Transactions on Computers, Applied Physics Letters, and Electronics Letters, and at such conferences as IEEE International Symposium on Circuits and Systems, Annual Conference On Information Sciences and Systems (CISS), Design, Automation and Test in Europe (DATE), IEEE Biomedical Circuits and Systems Conference (BioCAS), and International Semiconductor Device Research Symposium (ISDRS). He is a fellow of the IEEE and earned a PhD in electrical engineering and computer science from Johns Hopkins University.