Wednesday, January 25th
|B-101: Integration - 1 (sponsored by EMD Electronics) (Partitioning/Integration/Test Track)|
Paper Title: Using High-Performance FPGA Chiplets in Heterogenous Systems
Paper Abstract: Heterogeneous integration of FPGA-based accelerators with high-performance compute elements is a powerful approach as monolithic solutions become very expensive. Chiplet-based systems housed in a single package are the new design paradigm. Developers use CPUs, GPUs, ASICs and FPGAs to build heterogeneous processing systems where workloads are offloaded to the appropriate processing element. Bringing the elements together in one package provides benefits in terms of power, latency and cost. But identifying the appropriate offloads to put into chiplets in advance can be challenging as workloads evolve. FPGA based chiplets based on industry standard die to die protocols can provide flexibility. An example shows how eFPGA technology and a two-dimensional network-on-chip provide the building blocks for FPGA based chiplets.
Paper Author: Nick Ilyadis, Sr Director Product Planning, Achronix
Author Bio: Nick Ilyadis is Senior Director of Product Planning at Achronix, where he oversees all aspects of product planning from concept through production. Nick has 35 years of data and semiconductor engineering and manufacturing experience and holds 72 issued patents. A recognized expert on software and hardware development and quality control, he was previously VP Portfolio/Technology Strategy at Marvell Semiconductor and VP/Group CTO at Broadcom. He has extensive domain knowledge across semiconductors, networking, 5G, data centers, and automotive applications. He earned an MSEE in VLSI Technology from the University of New Hampshire. Nick has been active in many industry groups including the Ethernet Alliance and has participated in many conferences including HP Discover, OFC, Infocom, and Ethernet Technology Summit.