Wednesday, January 25th
03:15-4:15 PM
D-102: Annual Update on Chiplet Design: Multi-Die System in the post Moore Era (Annual Update Track)
Paper Title: Annual Update on Chiplet Design: Multi-Die System Design in the SysMoore Era

Paper Abstract: Multi-Die Systems (or Chiplets) require heterogeneous integration with all stages of development in mind from partitioning through design, test, verification, integration, and manufacturing. The major new concept is the idea of creating a building block that can be simply dropped into other designs or even sold on the open market. Therefore, the design must emphasize generality and standards (including die-to-die interfaces). The usual IC design requirements for optimizing power, performance, and area still apply. This update looks at the entire design process from a system-level approach and details the requirements going from one die to multiple dies to a system in package.

Paper Author: Shekhar Kapoor, Sr. Director of Product Marketing, Synopsys

Author Bio: