Paper Title: UCIe: An Open Standard Interface for Chiplet-Based Multi-Die Systems

Paper Abstract: All leading chip companies have now adopted chiplet-based designs, splitting monolithic SoCs into smaller dies or chiplets and then integrating them into a single package. This approach requires robust die-to-die connectivity that offers high bandwidth, low power consumption, low latency, and small chip area. An industry consortium has introduced the Universal Chiplet Interconnect Express (UCIe) as an open standard to meet the demand and standardize die-to-die connectivity. UCIe is a comprehensive standard that covers all aspects of the die-to-die interface stack with options to enable use cases ranging from simple device attachment using low-cost packages to large device disaggregation and scaling using high density connections in advanced packages. The interface offers latencies in the 2 ns range and power consumption of less than of 0.5 pJ/b. With the promise of many new features in the next few years, UCIe has become the leading technology for die-to-die connectivity.

Paper Author: Manuel Mota, Sr Staff Product Marketing Manager, Synopsys

Author Bio: Manuel Mota joined Synopsys in 2009 as a Product Marketing Manager and is responsible for the DesignWare Data Converter, High-Speed SerDes, and Bluetooth IP product lines. He brings more than 18 years of technical and marketing experience to his position. Prior to Synopsys, Manuel held product marketing, business development, and IP design positions at MIPS Technologies and Chipidea Microelectronica. Manuel holds a Ph.D. in Electronic Engineering from Lisbon Technical University which he completed while working at CERN (Switzerland) as a Research Fellow. He has authored multiple technical papers and presented in several technical conferences on analog and mixed-signal design.