Thursday, April 28th
|C-202: Academic Session (Academic Track)|
Paper Title: PANIC: A High-Performance NIC for Multi-Tenant Networks
Paper Abstract: Programmable NICs have diverse uses, and there is need for a NIC platform that can offload computation from multiple co-resident applications to many different types of substrates, including hardware accelerators, embedded FPGAs, and embedded processor cores. Unfortunately, there is no existing NIC design that can simultaneously support a large number of diverse offloads while ensuring high throughput/low latency, multi-tenant isolation, flexible offload chaining, and support for offloads with variable performance. This paper presents Frenzy, a new programmable NIC. There are two new key components of the Frenzy design that enable it to overcome the limitations of existing NICs: 1) A high-performance switching interconnect that scalably connects independent engines into offload chains, and 2) A new hybrid push/pull packet scheduler that provides cross-tenant performance isolation and low-latency load-balancing across parallel offload engines. We built an 100Gbps FPGA-based prototype to demonstrate its potential.
Paper Author: Jiaxin Lin, Graduate Student, University of Texas - Austin
Author Bio: Jiaxin Lin is a graduate student at the University of Texas Austin, major in Computer Science. She is now a part of the University of Texas Networked Systems (UTNS) Lab, advised by Aditya Akella. She is interested in computer network and system, especially in programmable hardwares, data center networks, big data system, and SmartNIC.