Wednesday, April 27th
3:10 PM-
A-102: Standards (Architectures/Software/Tools Track)
Paper Title: Standardizing SmartNICs for COTS Horizontally-Integrated Solutions

Paper Abstract: A common, consistent, and compatible hardware and firmware story has been crucial to the success of x86-based infrastructure. It is also a key issue in the strategy to seek industry adoption of 64-bit Arm and RISC-V based server and edge infrastructure. Such development enables off-the-shelf software to interoperate with a wide range of hardware. It also allows many products and solutions to be created without the inefficiencies of the full stack (hardware, firmware, OS, and application) approach seen in mobile, embedded, and early processor-based SmartNIC development. Significant benefits and challenges are involved in adopting a common hardware and firmware baseline for SmartNICs. Major benefits include allowing OSVs to easily enable support for DPUs from multiple vendors, and enabling solution providers to treat the SmartNIC space just like other datacenter infrastructure, i.e., as composable off-the-shelf components. SmartNICs can then become a general purpose open platform for innovation in I/O offload and acceleration. For Arm-based SmartNICs, the emphasis is on SystemReady ES as a baseline for hardware/firmware standardization. Common standards for integrating SmartNICs within servers are an essential factor in promoting their widespread use.

Paper Author: Andrei Warkentin, ARM Enablement Architect, VMware

Author Bio: Andrei Warkentin is an Arm Enablement Architect at VMware, where he is the Technical Lead for the ESXi-ARM team which conducts advanced development of vSphere hypervisor technology for the 64-bit Arm architecture. He is an architect for Project Monterey, an extension of VMware Cloud Foundation (VCF) using SmartNICs to improve performance, implement zero-trust security, and simplify operations across data center, edge, and cloud applications. He has worked on a wide range of issues related to Arm enablement and strategy, ranging from low-level hypervisor design and implementation to product definition and partner and ecosystem engagement. Before joining VMware, he worked at Motorola Mobility on Google Experience devices and at Microsoft on Hyper-V and UEFI projects. He earned a BS in computer science from the University of Illinois Chicago. He holds 38 patents and has three publications.