Thursday, June 15th
A-201: Network Acceleration 2 - High-Performance Systems (Networking Track)
Accelerating Open Virtual Switch (OVS) Using P4 and IPDK
Deb Chatterjee, Network Acceleration Team Lead, Intel

FPGA-Based SmartNICs Process Packets at 400 Gbps+
Lukas Kekely, CTO, BrnoLogic

B-201: Software 2 - Drivers and Managers (Software Track)
Writing Universal DPDK Drivers for SmartNICs
Jan Zieleznicki, Sr Software Engineer, CodiLime

Developing Secure IPU/DPU Device Management
Naru Sundar, Principal Engineer, Intel

C-201: Best Way to Accelerate Networks Today Panel (sponsored by Chelsio) (Panels Track)
Panel Members:
Panelist: Jon Sreekanth, Architect, Achronix

Panelist: Anu Murthy, VP Product, FADU

Panelist: Venkat Pullela, Chief Of Technology, Networking, Keysight Technologies

Panelist: Rochan Sankar, CEO, Enfabrica

Panelist: Bob Dugan, Program Manager, Chelsio Communications

Panelist: Trevor Caulder, Principal Developer/Advocate, NVIDIA

A-202: Application Acceleration 1 - Special Workloads (Application Acceleration Track)
SmartNICs and DPUs Accelerate HPC Solutions
Scot Schultz, Sr Director - HPC & Technical Computing, NVIDIA

Accelerating HPC and Deep Learning (DL) Applications with SmartNICs - Click for Proceedings
Donglai Dai, Chief Engineer, X-ScaleSolutions

Identifying Workloads Well-Suited to Acceleration by IPUs
Yadong Li, SW Architect, Intel

B-202: Best Architecture for SmartNICs Today Panel (Panels Track)
Panel Members:
Panelist: Eyal Tokman, DPU Architect, NVIDIA

Panelist: Raymond Nijssen, VP/Chief Technologist, Achronix

Panelist: DK Panda, Professor/Distinguished Scholar, Ohio State University

Panelist: Vikram Singh, Sr Product Line Manager, Juniper Networks

Panelist: Rich Cahill, Data Center Acceleration Engineer, Intel

C-202: Academic Research Review (Academic Track)
New Packet Queuing Method Allows for Protocol Updates and Switch Enhancements
Costin Raiciu, Professor, University Politehnica - Bucharest

Network Stack that Allocates Resources Independently in Each Layer
Qizhe Cai, PhD Student, Cornell

New TCP Stack Offloads Content Delivery I/O to a SmartNIC - Click for Proceedings
Taehyun Kim, Graduate Student, KAIST

FpgaNIC: A Versatile FPGA-based 100Gb SmartNIC for GPUs - Click for Proceedings
Jie Zhang, Graduate Student, Zhejiang University

A-203: Application Acceleration 2 - AI Applications (Application Acceleration Track)
Using SmartNICs to Achieve the Promise of ChatGPT
Itay Ozery, Director Product Management, NVIDIA

B-203: SmartNICs in 2028 and How We Got There Panel (sponsored by X-Scale) (Panels Track)
Panel Members:
Panelist: Baron Fung, Research Director, Dell'Oro Group

Panelist: Ahmet Houssein, CEO, SiPanda

Panelist: Scott Schweitzer, Director SmartNIC Product Planning, Achronix

Panelist: DK Panda, Professor/Distinguished Scholar, Ohio State University