Tuesday, August 8th
Tuesday, August 8th
8:30-10:50am
Forum A-11: NVMe and PCIe SSDs, Part 1 (NVMe/PCIe Storage Track)
Session Sponsor: NVM Express
Organizer + Chairperson: Brandon Hoff, Software Architect, Broadcom

Paper Presenters:
Major Additions in the NVMe 1.3 Standard
Peter Onufryk, NVM Solutions, Microsemi

NVMe in the Market with Market Data from IDC
Eric Burgener, Research Director Storage, IDC

Security Vision and Collaboration with TCG
Jeremy Werner, VP SSD Marketing & Product Planning, Toshiba

Features Needed for SSD Deployments at the Client
Gwendal Grignou, ,

NVMe - Features Needed for Large Scale SSD Deployments
Lee Prewitt, Principal Program Manager, Microsoft

NVMe Annual Update
Dave Landsman, Director Standards Group, Western Digital

Session Description:
Part 1: NVMe Workgroup - Updates, Trends, Directions, Plans 8:30 am - 9:35 am NVMe is starting to dominate the storage mainstream with almost all new storage products utilizing it. The specification has moved from being a simple codification of the demands of basic PCIe storage interfaces to a standard that can handle a wide range of storage issues. Architects and designers should expect to see even more new features that will make NVMe capable of handling every aspect of today’s enterprise storage systems. Part 2: New Applications and Support Mechanisms 9:45 am - 10:50 am NVMe is now adding the features storage designers need to handle applications ranging from clouds to clients. One key requirement is security. Threats are everywhere, and every aspect of storage systems must be protected. NVMe must offer the interfaces required to work with a wide variety of storage security standards. In particular, the NVMe Working Group and TCG (Trusted Computing Group) are working together to address security requirements.
About the Organizer/Moderator:
Brandon Hoff is Distinguished Software Architect at Broadcom, where he focuses on new product strategy, including product development interlock, business planning, and sales strategy development for growth initiatives. He has also worked on innovation initiatives, end user strategies, technology and strategy solutions for Web giants, and product portfolio leadership. He has been an active participant in NVM Express, the sponsoring organization for NVMe standards, and has also been IBTA Marketing Work Group Co-Chair. He is a frequent participant at industry events, including NVM Express meetings, SNIA conferences, and Ethernet Alliance events. He has over 25 years of industry experience, including a stint as Chief Strategy Officer/Chief Marketing Officer at CipherOptics, where he was responsible for managing all aspects of marketing, corporate strategy, product management, field and corporate marketing, marketing communications, public relations, branding, and lead generation. He holds an MBA from the University of Colorado (Boulder) and a BSEE from Colorado State University.

Tuesday, August 8th
8:30-10:50am
Forum B-11: Flash-Memory Based Architectures: A Technical Discussion, Part 1 (Architectures Track Track)
Session Sponsor: CNEX Labs
Organizer + Chairperson: Brian Berg, President, Berg Software Design

Paper Presenters:
Open-Channel SSDs Offer the Flexibility Required by Hyperconvergence
Matias Bjorling, Director Solid State System Software, Western Digital

Enhancing SSD Control of NVMe Devices for Hyperscale Applications
Luca Bert, Director, SSD Architecture and Advanced Development, Seagate

Avoiding Deadly Read Latencies with I/O Determinism
Steven Wells, Fellow – SSD Data Center Architecture, Toshiba

I/O Determinism and Its Impact on Data Centers and Hyperscale Applications
Bill Martin, Principal Engineer SSD I/O Standards, Samsung Electronics

Session Description:
There are currently several alternative approaches to the handling of detailed SSD operations such as the placement of data and the timing of garbage collection. The standard approach has been to embed the details inside the Flash Translation Layer (FTL). The driver then only has to perform straightforward input and output operations. However, hyperscale operators want to be able to control everything from the system software in the interests of obtaining more efficient operations and minimizing latency. I/O determinism and the open-channel SSD offer the higher flexibility at the cost of more complex system software. Both paradigms make sense in different markets with clouds and other hyperscale operators preferring greater control while smaller data centers prefer the simpler interface.
About the Organizer/Moderator:
Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA and Fibre Channel; and Storage Area Networks (SAN) and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer and technical writer. He has participated in over 60 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters coursework at Stanford University.

Tuesday, August 8th
8:30-10:50am
Forum D-11: Flash in Data Centers (Enterprise Storage Track Track)
Organizer + Chairperson: Tien Shiah, Product Marketing Manager - Memory, Samsung Electronics

Paper Presenters:
High Performance Big Data Processing Using Persistent Memory
Brian Bulkowski, CT0/Co-Founder, Aerospike

High-Speed MRAM Buffer Increases Enterprise SSD Performance
Trevor Smith, Technical and Business Consultant, Everspin Technologies

Improving Database Performance w/Flash & the Storage Performance Development Kit
Ben Walker, Storage Solutions Architect, Intel

Applying the Latest SSD Architectures to Accelerate NoSQL Databases
SangWon Lee, Professor, Sungkyunkwan University

Implementing Automatic Performance Tuning in Today’s Storage Systems
Andy Mills, CEO, Enmotus

Session Description:
Flash can serve many purposes in data centers. It can provide an additional tier of fast-accessing storage, it can increase application performance and decrease latency, and it can provide caching for information traveling to and from the cloud. In turn, software optimized for flash will provide improved performance at no additional cost. Flash thus both makes applications run better and provides an efficient foundation for such new approaches as object storage, software-defined storage, storage virtualization, and the software-defined data center.
About the Organizer/Moderator:
Tien Shiah is a Product Marketing Manager at Samsung Semiconductor, where he acts as a memory technology evangelist, product consultant, and market expert. He has presented at many industry and customer events such as Flash Memory Summit, Storage Developer Conference, Creative Storage Conference, Dell EMC World, and VMWorld. He also has written articles on storage technology and trends in major publications such as EE Times, Network World, and InfoWorld. He earned an MBA from McGill University and a BSEE from the University of British Columbia.

Tuesday, August 8th
8:30-10:50am
Forum G-11: Enterprise Applications, Part 1 (Enterprise Applications Track Track)
Chairperson: Tom Burniece, President, Burniece Consulting Services

Organizer: Tom Burniece, President, Burniece Consulting Services

Paper Presenters:
Powering Cloud Scale Applications with All-flash
Sundip Arora, Director Product Marketing, Kaminario

How End-to-End NVMe Will Impact Applications
Ivan Iannaccone, ,

Improving SAS Analytics Performance with Flash
Robert Triendl, SVP of Global Sales, Marketing, and Field Services, DataDirect Networks

A Customer's Flash-Powered Digital Transformation
Mark Adams, Product Marketing Director, Hitachi Data Systems

Flash Storage Drives a Better Bottom Line
Aravindan Gopalakrishnan, Product Manager, HP

Enterprise Data Warehouse (EDW) Migration Overview
Amanda Strassle, Senior Director IT, Seagate

Extending In-Memory Database Processing to Shared Flash
Gurmeet Goindi, ,

Session Description:
Flash memory has revolutionized storage system and computing architectures for many enterprise applications. Actual case studies from innovative storage companies, including descriptions of the problem, approach, and results, provide examples of practical situations. Applications will include SQL and NoSQL databases, OLTP, data warehousing, big data analytics, Hadoop/MapReduce, financial transactions, and in-memory computing. Customers will co-present with some speakers.
About the Organizer/Moderator:
Tom Burniece is an independent business consultant with over 30 years of senior management experience in the networking and storage markets. He specializes in strategy formulation, business development, marketing, and due diligence. He has worked with well over 50 companies from unfunded startups to large public corporations, including venture and private equity firms. He is a highly experienced CEO and board member and has been general manager with profit and loss responsibility for a billion-dollar division of Digital Equipment. Before becoming an independent consultant, he was also Chairman of Ciprico and a senior executive at Maxtor and Control Data. He holds a BEE from the University of Minnesota and an MSEE from Arizona State University. He is also a graduate of MIT’s Sloan Senior Executive Program.

Tom Burniece is an independent business consultant with over 30 years of senior management experience in the networking and storage markets. He specializes in strategy formulation, business development, marketing, and due diligence. He has worked with well over 50 companies from unfunded startups to large public corporations, including venture and private equity firms. He is a highly experienced CEO and board member and has been general manager with profit and loss responsibility for a billion-dollar division of Digital Equipment. Before becoming an independent consultant, he was also Chairman of Ciprico and a senior executive at Maxtor and Control Data. He holds a BEE from the University of Minnesota and an MSEE from Arizona State University. He is also a graduate of MIT’s Sloan Senior Executive Prog

Tuesday, August 8th
8:30-10:50am
Forum N-11: Flash Growth & Opportunity in China (China Track)
Organizer + Chairperson: Chuck Sobey, Chief Scientist, ChannelScience

Co-Organizer + Co-Chair: Jerome Luo, President, Sage Microelectronics

Paper Presenters:
A New Era Under Construction: Memory Business in China
Mark Cao, Vice President of Strategic Marketing, GigaDevice Semiconductor

Developing Fast Distributed Log Service in Storage Class Memory (SCM)
Wei Zha, Chief Technology Planner of Storage Product, Huawei

Status and Trends of Server SSD, Flash Array, and SSD Disk in China Enterprises
Hao Cui, Sr Chief Editor, WatchStor.com

Opportunities and Challenges in China's SSD Market
Geoffrey Xu, Technical support manager, Shannon Systems

Small Form Factor for PCIe and SATA Devices
Jordan Zhong, Product Marketing Director, Longsys Electronics

Data Security Inside SSD Controllers
Chris Tsu, General Manager, Sage Microelectronics

3D NAND SSD Transition in Chinese Data Centers
Taile Zhang, VP, Memblaze

FlashTarget: A 10M IOPS Level of Open Source Solutions for Soft RAID and Target
Feng You, General Manager, FusionStack Storage

Session Description:
China is today a major player in both using and developing flash products. Those working at organizations outside China need to understand what is happening currently at Chinese companies, universities, and other organizations. The Chinese market offers many potential opportunities for products, services, and collaboration. Interests range throughout the non-volatile memory area, including development of new technologies, enterprise storage, embedded applications, and hyperscale datacenters.
About the Organizer/Moderator:
Chuck Sobey is an internationally-respected technology advisor, researcher, and lecturer; as well as the Interim Conference Chairperson of the 2017 Flash Memory Summit. He is the founder of the confidential R&D services firm ChannelScience, which works with startups, Fortune 100 companies, and large institutions to develop new capabilities in data storage and establish the state-of-the-art. He has deep expertise in the design, function, manufacture, and test of data storage devices. Chuck is currently applying machine learning techniques to reduce R&D cycle times and is developing signal processing and coding algorithms matched to the physics of STT-MRAMs (spin transfer torque). As China focuses on flash as a strategic initiative, Chuck was honored to give the opening technical keynote address at the first flash conference held there. Chuck is an electrical and computer engineering graduate of Carnegie Mellon University and the University of California at Santa Barbara

Jianjun (Jerome) Luo is the founder and president of Sage Microelectronics, a provider of ICs and solutions for digital storage and data security applications (including SSD controllers). It has offices in Silicon Valley and in Hangzhou, China. He is also a Professor and Director of the Microelectronic Research Institute at Hangzhou Dianzi University. Jerome helped organize the first flash memory conference held in China (the China Flash Forum held in Beijing on October 23, 2014). He has been an ASIC design engineer and Director of R&D at Initio and has designed more than 10 ASICs. He earned a PhD in semiconductor technology from Zhejiang University, a Master’s in Microelectronics from the Hangzhou Institute of Electronics Engineering, and a Bachelor’s in Electronics Engineering from Shanghai Jiaotong University

Tuesday, August 8th
8:30-10:50am
Forum T-11: Flash in Autonomous Vehicles, Part 1 (Automotive Track Track)
Co-Organizer: Brian Berg, President, Berg Software Design

Organizer + Chairperson: Andy Marken, President, Marken Communications

Paper Presenters:
DICE: The Foundation of Trust Auto, IoT Security
Dennis Mattoon, Software Engineer, Microsoft

Securing Sensitive Data When It Leaves the Car
Jeff Rubin, VP Strategy and Business Development and Co-Founder, Beachhead

Cars Are More Than a Smart Phone on Wheels
Alan Messer, CTO of Global Connected Consumer Experience/VP of Software and Innovation, General Motors

The Challenge of Securing Privacy for Modern Automobiles
Robert Thibadeau, Chairman/CEO, Drive Trust Alliance

Ballooning demand for NAND Flash in Autonomous Vehicles beyond 2020
Hrishikesh Sathawane, Senior Staff Storage Analyst, Toshiba

The State of Liability Law and Data Privacy in Automotive
Stephen S. Wu, Attorney, Silicon Valley Law Group

Session Description:
Automotive Security, Privacy I - What Is Under The Hood The autonomous car will only emerge because of the CPU/GPU, storage and a few rules of the road. Now is the time to get your hands greasy and be part of the totally new way of getting around. CPUs will be checking, monitoring, capturing - and wanting to store - data from the wheels up. Thousands of firms are spending big to have a place in tomorrow's transportation. It isn't exhaust fumes you smell, it's money and this session will keep you from being left in the dust. Find out how will the industry wants to/plans to keep all that data is secure and private. This panel will tell you the security and privacy issues. They'll discuss the practical and global issues. Learn how self-encrypting flash storage could satisfy everyone in the ecosystem ...and you! Advanced Auto Security, Privacy II - A Foolproof Solution When the Fool Doesn't Drive There are more electronic engineers and programmers in auto firms today's than car designers/specialists. They have one goal (beside selling more cars than the next guy) make sure the computation and storage are fast, reliable, accurate and safe enough to be around people. The panel detail advanced computational architectures storage will have to support to be included. Find out first hand about advanced IoT systems that are being developed. Learn about security/privacy issues your products need to address to be included in the vehicles. Understand what your organization and you need to be included in the safe, secure, private moving computer/storage system.
About the Organizer/Moderator:
Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA and Fibre Channel; and Storage Area Networks (SAN) and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer and technical writer. He has participated in over 60 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters coursework at Stanford University.

Andy Marken is the president of Marken Communications, a marketing consulting and communications agency. For over 25 years, he has worked with leading national and international content development, information, and storage firms. Andy has written over 200 articles on management, marketing, and communications. He is also a widely quoted and recognized insider commentator and interpreter of personal computer/consumer electronics (PC/CE) industry trends and activities

Tuesday, August 8th
3:40-6:00pm
Forum A-12: NVMe and PCIe SSDs, Part 2 (NVMe/PCIe Storage Track)
Session Sponsor: NVM Express
Organizer + Chairperson: Brandon Hoff, Software Architect, Broadcom

Chairperson + Speaker: Uma Parepalli, Sr Manager, Western Digital

Paper Presenters:
NVMe-oF Next Frontier - on TCP Layer
Dave Mintern, ,

New Features in NVMe Drivers for Linux, Windows, and VMware
Uma Parepalli, Sr Manager, Western Digital

An Overview and New Features Targeting NVMe-MI 1.1
Austin Bolen, Sr Principal Engineer, Dell

How to Build Storage Solutons with the Storage Providers Development Kit (SPDK)
Jim Harris, Principal Software Engineer, Intel

Current/Available Fabrics for NVMe-oF
Rob Davis, ,

Session Description:
Part 2a: Providing Strong Software and Management Support 3:40 pm - 4:45 pm NVMe now offers all the features developers need to create complex storage systems including faster and more resilient drivers, an extensive management interface (NVMe-MI, including out-of-band management and a management controller), and optimized, highly tested tools for developing user space software. In particular, the Intel Storage Performance Development Kit (SPDK) offers high-speed implementations of all user storage stacks. Part 2b: NVMe Does Networking (NVMe-oF) 4:55 pm - 6:00 pm NVMe over Fabrics (NVMe-oF) takes NVMe beyond the single-computer paradigm to be useful in clouds, clusters, distributed systems, and megawebsites. It can unleash the benefits of NVMe drives in a scalable manner by leveraging mainstream high-performance interconnects. Several fabrics have already taken the lead in proposed deployments, and others are being considered. The various fabrics have their pros and cons as platforms, and the choice depends on the value they provide specific applications and workloads. Tangible data and analysis are now available to cover performance, cost, scalability, and ease of design.
About the Organizer/Moderator:
Brandon Hoff is Distinguished Software Architect at Broadcom, where he focuses on new product strategy, including product development interlock, business planning, and sales strategy development for growth initiatives. He has also worked on innovation initiatives, end user strategies, technology and strategy solutions for Web giants, and product portfolio leadership. He has been an active participant in NVM Express, the sponsoring organization for NVMe standards, and has also been IBTA Marketing Work Group Co-Chair. He is a frequent participant at industry events, including NVM Express meetings, SNIA conferences, and Ethernet Alliance events. He has over 25 years of industry experience, including a stint as Chief Strategy Officer/Chief Marketing Officer at CipherOptics, where he was responsible for managing all aspects of marketing, corporate strategy, product management, field and corporate marketing, marketing communications, public relations, branding, and lead generation. He holds an MBA from the University of Colorado (Boulder) and a BSEE from Colorado State University.

Uma Parepalli is a senior director at a stealth mode startup, working on next generation cloud server and storage solutions. He is a server platform Firmware and NVMe Storage expert, and involved in development of various industry standards specifications for many years. Uma previously worked for SK Hynix, Dell EMC, and Intel etc in various senior level engineering and management roles from senior principal engineer/architect to director, CTO, VP and head of engineering. He managed global engineering, sales, product and program management teams. Uma architected and developed the next generation embedded, server, storage and networking products and technologies for the past 26 years. He is a computer engineering graduate from University of Mysore, India

Tuesday, August 8th
3:40-6:00pm
Forum B-12: Flash-Memory Based Architectures: A Technical Discussion, Part 2 (Architectures Track Track)
Organizer + Chairperson: Brian Berg, President, Berg Software Design

Co-Organizer: Kurtis Bowman, President, Gen Z Consortium

Paper Presenters:
Gen-Z Technology Treats Networks and Storage as Super-Fast Memory
Kurtis Bowman, President, Gen Z Consortium

Designing FTLs for High Capacity Drives
Tim Canepa, Chief Architect and Director of Architecture, Independent Consultant

Aligning Pages and Blocks to Maximize Flash Read Bandwidth
Peter Graumann, VP Performance Solutions Group, Microsemi

Updating SSD Architectures to Take Advantage of PCIe Gen 4
Rob Sykes, Sr Distinguished Engineer, Toshiba

Session Description:
Architects continue to examine a variety of ways to increase flash performance and allow for upgrades in technology. Typical approaches include aligning pages and blocks and examining the details of write amplification to minimize its effects. A self-learning flash translation layer (FTL) helps avoid the problem of obsolescence caused by technology advances. A more cosmic approach is to handle the emergence of persistent memory and ultra-high-speed networks by treating everything as super-fast memory.and avoiding the need for long delays or transfers that bypass standard processor channels.
About the Organizer/Moderator:
Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA and Fibre Channel; and Storage Area Networks (SAN) and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer and technical writer. He has participated in over 60 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters coursework at Stanford University.

Kurtis Bowman is the Director of Technology and Architecture in Dell’s Server CTO Office where he focuses on identifying pertinent new technologies/technology suppliers and preparing them for integration into Dell enterprise products. Kurtis engages with customers to learn their usage models and pain points and maps technologies into future products to improve data center efficiency. He was elected as president of the Gen-Z consortium in 2016 and led the successful public launch of the group. Kurtis has been in the computer design business for over 25 years were he has been involved in the architecture, development, and business justification of server, storage, commercial and consumer computing products. He joined Dell in 2006 and has managed global teams to help deliver multiple generations of server, storage and client products. Prior to joining Dell, Kurtis held technical leadership positions at Panasas, a high-performance storage company, and Compaq.

Tuesday, August 8th
3:40-5:45pm
Forum C-12: Enterprise SSDs (SSDs Track Track)
Co-Organizer: Jody Glider, Storage Architect,, SAP Labs

Organizer + Chairperson: Scott Shadley, VP Marketing, NGD Systems

Paper Presenters:
Tri-Hybrid SSD with SCM and MLC/TLC NAND Flash Memories
Chihiro Matsui, Graduate Student, Chuo University/University of Tokyo (Japan)

How Suspending Duplicate Flash Requests Benefits Enterprise Apps Performance
Debin Wu, Senior Staff Engineer for SSD IP Design, Starblaze Technology

Agility at Hyperscale -- Making Elephants Dance
Joel Dedrick, Systems Architect, Toshiba

Predicting SSD Performance for Today’s Dynamic Workloads
Shirish Bahirat, NVE System Architect, Micron

Session Description:
Enterprise SSDs are achieving higher capacities and higher performance and are therefore used in more applications, displacing HDDs in a wide variety of environments. Storage system designers must make new tradeoffs among performance, data retention and endurance for SSDs to account for their special characteristics. Hyperscale data centers also have special requirements that must be met, most likely with architectures specifically intended for these fast-growing environments.
About the Organizer/Moderator:
Jody Glider is a Storage Architect at SAP Laboratories, where he leads a team that investigates the integration of the latest software-defined storage technologies into SAP’s cloud infrastructure. Before joining SAP, he spent almost 20 years as a Senior Technical Staff Member at IBM Almaden Labs. He has been a leader in developing commercial RAID arrays, storage virtualization platforms, and data reduction systems. He has also investigated ways of achieving cloud data privacy while retaining the advantages of data reduction. He holds 25 patents and has written 6 refereed conference and journal papers. He earned a BSEE from Rensselaer Polytechnic Institute (RPI).

Scott Shadley is a Principal Technologist, supporting Micron’s datacenter and enterprise SSD products including marketing initiatives. His responsibilities include roadmap definition, P&L ownership, customer engagement, and driving the marketing strategy for storage products. Previously, he was a Senior Product Marketing Team Manager, helped create the business development team within storage, and was a Product Marketing Manager for the SATA SSD programs. Scott has also been Director of Enterprise SSD Marketing at STEC. He earned a BSEE from Boise State University and an MBA from the University of Phoenix.

Tuesday, August 8th
3:40-6:00pm
Forum D-12: Enterprise Storage Design, Part 1 (Enterprise Storage Track Track)
Co-Organizer + Co-Chair: Sanhita Sarkar, Director Analytics, Western Digital

Co-Organizer + Co-Chair: Steve Garceau, Sr Manager Enterprise SSD Marketing, Toshiba

Paper Presenters:
How to Design Winning Flash-based Arrays for the Enterprise Storage Market
Curt Beckmann, ,

Can Next-Generation 3D TLC NAND Extend Enterprise Applications?
Thomas Griffin, Engineer, IBM

Many-Channel DMA for Enterprise Storage SoCs
Stephane Hauradou, CTO, PLDA

The EDSFF Consortium's New Form Factor for SSDs
Jonathan Hinkle, Principal Researcher, Lenovo

Session Description:
Enterprise storage today must adapt to new requirements in the data center. Although cloud computing, analytics, deep learning, and big data have received the most attention recently, server and desktop virtualization, data tiering, efficient architectures, and implementation of data policies still must be further addressed. As the number of applications and users keeps increasing, the need for rapid, predictable, and intelligent access to data becomes more important. Solid state storage is a key technology in meeting higher demand and providing faster access to data at reasonable cost. However, managers must understand which flash technology to adopt and how to make price/performance tradeoffs. New physical architectures, new technologies, and new approaches to long-existing issues such as caching and distributed systems must all be leveraged to optimize enterprise storage and its solutions.
About the Organizer/Moderator:
Sanhita Sarkar is a Global Director Analytics at Western Digital, where she focuses on software design and development of analytical features and solutions spanning edge, data center, data lake, and cloud. She has expertise in key vertical markets such as the Industrial Internet of Things (IIoT), Defense and Intelligence, Financial Services, Genomics, and Healthcare. Sanhita previously worked at Teradata, SGI, Oracle, and several startups. She was responsible for overseeing design, development, and delivery of optimized software and solutions involving large memory, scale-up, and scale-out systems. Sanhita has authored four patents, published several papers, and spoken at several conferences. She received her Ph.D in Electrical Engineering and Computer Science from the University of Minnesota, Minneapolis.

Steve Garceau is Sr Manager Enterprise SSD Marketing at Toshiba America Electronic Components, where he focuses on strategic and technical marketing, business analysis/planning, product line management, sales training, and market research and analysis. He has been working in the flash memory area for 10 years with an emphasis on SSDs, PCIe/NVMe, and NAND flash. Before joining Toshiba, he worked in product management and marketing at QLogic, Viking Technology, and STEC. He holds a BS in Marketing – Business Administration from California State University Long Beach.

Tuesday, August 8th
3:40-5:45pm
Forum Q-12: Key-Value SSDs Accelerate Big Data Solutions (SSDs Track Track)
Organizer + Chairperson: Chuck Sobey, Chief Scientist, ChannelScience

Paper Presenters:
The Cloud Era, Scalability, and a New Technology
Yang Seok Ki, Director of Memory Solutions, Samsung Electronics

Standards
Bill Martin, Principal Engineer SSD I/O Standards, Samsung Electronics

Ecosystem
Changho Choi, Principal Engineer, Samsung Semiconductor

Use Case and Performance Studies
Ron Lee, Senior Manager, Memory Solutions Lab, Samsung

Session Description:
Big data continues to create huge computer performance problems, particularly as the amount of data keeps increasing rapidly. One highly promising solution is to bring database organization right into the SSD rather than force a further time-consuming translation into tracks and sectors. The key-value SSD is organized the way databases want to see things rather than as fixed-size sectors. That is, the key value approach sends accesses directly to the file of object data. Avoiding extra translations increases performance, simplifies management, and allows for nearly unlimited system scaling. Transactions and queries run much faster. The idea is a powerful one, and Samsung will discuss a fully tested example of what can be achieved. However, a global industry standard is essential to provide the interoperability universal support, and robust ecosystem that users demand from a technology that supports their most basic applications. SSD vendors, software providers, system builders, and network collaborators must join together to meet the needs of datacenters, clouds, websites, and other customers. Organization: Cloud: A New Era (5 minutes) Scalability: A New Challenge (10 minutes) Key-Value SSD: A New Technology (15 minutes) Ecosystem (20 minutes) Q&A (10 minutes) Break (15 minutes) Use Cases and Performance Studies (30 minutes) Standards (15 minutes) Wrap-Up (5 minutes) Q&A (10 minutes)
About the Organizer/Moderator:
Coming soon..

Coming soon..

Tuesday, August 8th
3:40-5:45pm
Forum R-12: 3D XPoint: Current Implementations and Future Trends (Persistent Memory Track Track)
Chairperson: Marc Farley, Principal, Idix

Chairperson: Mark Webb, President, MKW Ventures

Paper Presenters:
Part 2. 3D XPoint in 2022: Where We Are and How We Got There
Jeff Barber, Chief Revenue Officer, Apeiron Data Systems

Part 1. 3D XPoint: Current Applications and Implementations
Milind Weling, Sr VP Programs and Operations, Intermolecular

Session Description:
The speculation surrounding Intel/Micron 3D XPoint technology has been huge, ever since its introduction in 2015. What is the reality? Where is the technology today and what applications are already using it? What are the effects of the relatively high prices (five times that of flash) that have now been suggested? Where will the technology be in 2022 and what steps will occur along the way? Obviously, this is long-term speculation with no guarantees. However, a look at the far horizon can provide guidance as to what developers are thinking and what initial users and observers now feel is possible.
About the Organizer/Moderator:
Coming soon..

Coming soon..

Tuesday, August 8th
3:40-6:00pm
Forum T-12: Flash in Autonomous Vehicles, Part 2 (Automotive Track Track)
Organizer: Andy Marken, President, Marken Communications

Chairperson: Brian Berg, President, Berg Software Design

Chairperson: Bita Sistani, Direcor, Business Development Automotive, Samsung Semiconductor India R&D

Paper Presenters:
Requirements for Non-Volatile Memory in Automotive Applications
Michael Huonker, Engineer Advanced Head Unit, Daimler AG

Flash Memories for Autonomous Cars
Dr. Rainer Hoehler, Vice President and General Manager, Flash Business Unit, Cypress Semiconductor

Flash Memory in the Emerging Age of Autonomy
Stephan Heinrich, Technical Lead Autonomous Driving Platform HW, Lucid Motors

An End-User's Perspective on Flash in Vehicles
Alison Chaiken, Sr Software Engineer, Peloton Technology

Using F-RAM for Automotive Event Data Recording
Doug Mitchell, Product Marketing Engineer MPS, Cypress Semiconductor

Over-the-Air (OTA) Software Updates and Data Collection Driving Memory Needs
Greg Basich, Associate Director, Automotive Infotainment and Telematics and Connected Mobility Services, Strategy Analytics

Session Description:
Automated and Connected Vehicles - Storage Beyond the Trunk It feels like everyone wants to sell their products into the fully automated, advanced driver-assisted sensor (ADAS) connected car. Find out where the sensor-based, video-oriented electronic systems are being designed in. Learn how the demand for better, faster, more reliable storage is growing. Hear how radar, sonar, lidar and elaborate/elegant in-car HD camera systems will be part of sophisticated infotainment systems. Get inside information from leading autonomous system architecture designers of tomorrow's cars. Find out about the wide array of tailored flash memory solutions - NVMe solid state drives, Universal Flash Storage and other NAND-based in-car storage solutions you will have to produce to be competitive. Get Your Storage on The Highways, Not in the Ditch Until now no one bragged about how much storage their car had, how fast off the line it was and how much safe mileage it would provide. No one cared! Now storage is sexy, worth talking about. Instead of focusing on better headlights, better brakes, better entertainment systems or horsepower people want to know if the storage is big enough, rugged enough, safe enough for them. If 80 percent of the data systems accumulate will stay in the car learn what it takes to have your storage designed in because it is fast, accurate, safe, secure and life-saving. Learn first hand what it takes to get your storage solutions the car and on the road.
About the Organizer/Moderator:
Andy Marken is the president of Marken Communications, a marketing consulting and communications agency. For over 25 years, he has worked with leading national and international content development, information, and storage firms. Andy has written over 200 articles on management, marketing, and communications. He is also a widely quoted and recognized insider commentator and interpreter of personal computer/consumer electronics (PC/CE) industry trends and activities

Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA and Fibre Channel; and Storage Area Networks (SAN) and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer and technical writer. He has participated in over 60 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters coursework at Stanford University.

Coming soon..

Wednesday, August 9th
Wednesday, August 9th
8:30-10:50am
Forum A-21: PCIe/NVMe Issues (NVMe/PCIe Storage Track)
Organizer + Chairperson: Maulik Sompura, Director Product Management, Toshiba

Paper Presenters:
Developing Extremely Low-Latency NVMe SSDs
Young Paik, ,

A Comparison of NVMe NVRAM vs NVDIMM: a Database Application Example
Mickael Guyard, Sales/Marketing Manager, IP-Maker

NVMe Performance Optimization and Stress Testing
Isaac Livny, Applications Engineer, TELEDYNE LECROY

Maximizing PCIe NVMe Bandwidth and IOPS
Manuel d'Abreu, Sr VP / Chief Scientist, Smart IOPS

Session Description:
PCIe SSDs offer higher performance than ones based on disk interfaces, since they utilize the high-speed (and widely supported) PCIe bus. They have quickly become popular in a wide variety of enterprise applications, particularly in implementations utilizing the new NVMe standard. Of course, all the usual design problems occur ranging from connectors through power management, power consumption, configurability, and hardware/software tradeoffs. But with over 100 million enterprise PCIe ports already shipped, this is an approach enterprises find to be both reasonably priced and easily implemented. It can work in both client and data center applications.
About the Organizer/Moderator:
Coming soon..

Wednesday, August 9th
8:30-10:50am
Forum D-21: Enterprise Storage Design, Part 2 (Enterprise Storage Track Track)
Organizer: Renu Raman, VP Cloud Architecture and Engineering, SAP

Organizer + Chairperson: Allen Samuels, Engineering Fellow, Western Digital

Paper Presenters:
3D-NAND Scaling & 3D-SCM - How It's Changing Enterprise Storage
Jung Yoon, Sr Technical Staff Member - Silicon Technology & Quality, IBM Procurement Engineering

Achieving Efficient Software Management of Memory & Storage Tiering
Maher Amer, CTO, Diablo Technologies

Applying Swarm Intelligence to Optimize Flash Utilization
Rayan Zachariassen, CTO, ioFabric

Extending Caching to Multiple-host Distributed Systems
Andy Banta, Storage Janitor/Virtualization Architect, NetApp

Persistence at Memory Speed to Accelerate Enterprise Applications
Terry Hulett, VP Systems Engineering, Everspin Technologies

Session Description:
Enterprise storage today must change to meet new requirements in the data center. Cloud computing, analytics, and big data are among the latest drivers, but existing drivers such as server and desktop virtualization, data tiering, efficient architecture, and implementation of data policy still must be further addressed. Meanwhile, the numbers of applications and users keeps increasing, as does the need for rapid, predictable access. Solid state storage is an important technology in satisfying increased demand and providing quicker access at reasonable cost. However, managers must understand what flash technology can provide and how to make cost/performance trade-offs. New physical architectures, new technologies, and new management approaches must all be used to enable optimal architecture.
About the Organizer/Moderator:
Renu Raman is VP Vice President/Chief Architect - Cloud Architecture & Engineering at SAP. He is responsible for the architecture, design, and development of SAP’s groundbreaking HANA cloud infrastructure compute and storage. He also has devised a high-performance persistence architecture for in-memory databases which he described at a previous Flash Memory Summit. He was previously Founder/CEO at Unity Microsystems, a developer of memory virtualization technology. He also had a long career at Sun Microsystems where he focused on developing many highly successful SPARC processors and associated devices. He was also an executive-in-residence at Tallwood Venture Capital for several years. He earned an MSEE from Northwestern University

Allen Samuels is anEngineering Fellow at Western Digital/SanDisk, where he is responsible for directing software development for system level products. He has previously served as Chief Architect at Weitek and Citrix, and founded several companies including AMKAR Consulting, Orbital Data, and Cirtas Systems. He holds over 40 patents in such areas as storage, networking, and system Design and is responsible for award-winning products in PC graphics, laser printer processors, WAN optimization, and flash storage. A frequent conference presenter, he has appeared recently at the Vault Linux Conference, OpenStack Summit, Open Server Summit, and worldwide LinuxCon events. Allen has a BSEE from Rice University (Houston, TX).

Wednesday, August 9th
8:30-10:50am
Forum E-21: Controllers and Flash Technology, Part 1 (Controllers Track Track)
Organizer + Chairperson: Erich Haratsch, Director, Engineering Flash Channel Architecture, Seagate

Paper Presenters:
SSD Lifetime Extension using Multi-Code-Rate LDPC with Multi-Dimensional LLR
Rino Micheloni, VP Performance Solutions Group, Microsemi

Optimizing a SSD Controller Platform for Reusability and Reliability
Andrei Vityaev, Chief Strategy Officer, Mobiveil

Performance Advantages of Spatially Coupled ECC in Flash Memories
Homa Esfahanizadeh, Sr PhD Student, UCLA Electrical Engineering Dept

Using Machine Learning to Enhance Flash Endurance & Latency
Cloud Zeng, Sr Engineer, Lite-On Storage Group

ECC Approach for Correcting Errors Not Handled by RAID Recovery
Jeff Yang, Principal Engineer, Silicon Motion

Session Description:
This forum provides details on improving the endurance, retention, and performance of 2D and 3D NAND flash devices. Important strategies and signal processing that controllers can employ to further improve key reliability measures are revealed. The forum also presents novel implementations for reducing power usage and solving problems caused by write amplification. Learn about new technology developments and have time for questions and answers with top industry experts.
About the Organizer/Moderator:
Dr. Erich F. Haratsch is Director of Engineering at Seagate Technology, where he is responsible for architecture development of performance, endurance, error correction and media management features in solid state disk controllers. Earlier in his career, Haratsch developed signal processing and error correction technologies for hard disk drive controllers at LSI Corporation, which shipped in more than one billion chips. He started his engineering career at Bell Labs Research, where he invented new chip architectures for Gigabit Ethernet over copper and optical communications. Haratsch is a frequent speaker at leading industry events, is the author of over 40 peer-reviewed journal and conference papers, and holds more than 100 US patents. He earned his MS and PhD degrees in electrical engineering from the Technical University of Munich (Germany).

Wednesday, August 9th
8:30-10-50am
Forum F-21: SSD Testing (Testing/Performance Track Track)
Organizer + Chairperson: Easen Ho, President, S3 Metrics

Co-Organizer: Joseph Chen, VP Engineering, ULINK Technolgy

Paper Presenters:
The Role Flash Should Play in Processing 4K Video
Dave Frederick, Sr Director Media & Entertainment, Quantum

Modeling QLC Flash Reliability
Nenad Miladinovic, Founding Engineer, Purestorage Inc.

Getting it Right: Testing Storage Arrays The Way They’ll be Used
Peter Murray, Principal Systems Engineer, Virtual Instruments

Optimizing SSD Latency and Performance in Enterprise Applications
Taile Zhang, VP, Memblaze

Session Description:
Testing and performance analysis are an essential part of flash development and system evaluation. Conformance to standards, behavior under environmental stress, and the effects of varying workloads and system conditions must all be checked thoroughly. Performance analysis is also a key to determining how devices will behave in operation and in comparing devices during the evaluation stage. One problem of particular concern is wear, since the underlying memory elements are known to fail after a certain number of writes have been performed. Evaluations must be done with workloads that reflect actual client experience to ensure validity.
About the Organizer/Moderator:
Easen Ho is the president of S3Metrics, a consultancy specializing in SSD testing. He was formerly CTO of Calypso Systems, a leading solid state technology test equipment and test services company. Easen has been active in test standards development, and has given many talks at events such as Flash Memory Summit. He is a principal architect of the SNIA Solid State Storage Performance Test Specification. He received his PhD from MIT and an MS from Tokyo Institute of Technology, both in laser and optical engineering. He has been involved in many storage ventures over the last 15 years, including being Founder and President of Digital Papyrus.

Joseph Chen is VP Engineering at Ulink Technology, a supplier of IT storage interface test tools. His focus areas include enterprise HDD/SSD development and qualification, SoC technical management, self-encrypted drives, and industry standards such as T10, IEEE 1667, and the Trusted Computing Group. He was previously Director of Systems Technology and Senior Firmware Manager at Samsung Electronics - SISA. At Samsung, he supervised SAS SSD design and development and managed the self-encrypting drive (SED) development project to produce Opal compliance. He has 30 years experience in the high-technology industry, including positions at Silicon Magic and Cirrus Logic. He holds an MS in computer science from Texas A&M University.

Wednesday, August 9th
8:30-10:50am
Forum G-21: Enterprise Applications, Part 2 (Enterprise Applications Track Track)
Organizer: Tom Burniece, President, Burniece Consulting Services

Chairperson: Tom Burniece, President, Burniece Consulting Services

Paper Presenters:
IBM Customer Study
Eric Stouffer, VP Distributed Storage BU, IBM

United Center Case Study
Rob Commins, VP Corporate Marketing, Tegile Systems

Scaling Up as well as Scaling Out
Pete Jarvis, VP Business Development, TidalScale

Scaling IP Video CDN with All-Flash
Mike Gluck, VP/CTO, Sanity Solutions

Leveraging the Latest Flash in the Data Center
Steve Knipple, Principal Consultant, Cloud Shift Advisors

Increase SQL Server Performance 20x
Sushant Rao, Sr Director Product Marketing, DataCore Software

Session Description:
Flash memory has enabled new storage system and computing architectures which can handle many enterprise applications far more efficiently than is possible with hard drives. This session will feature actual case studies by innovative storage companies, including descriptions of the problem, approach, and results. Customers will co-present with some speakers.
About the Organizer/Moderator:
Tom Burniece is an independent business consultant with over 30 years of senior management experience in the networking and storage markets. He specializes in strategy formulation, business development, marketing, and due diligence. He has worked with well over 50 companies from unfunded startups to large public corporations, including venture and private equity firms. He is a highly experienced CEO and board member and has been general manager with profit and loss responsibility for a billion-dollar division of Digital Equipment. Before becoming an independent consultant, he was also Chairman of Ciprico and a senior executive at Maxtor and Control Data. He holds a BEE from the University of Minnesota and an MSEE from Arizona State University. He is also a graduate of MIT’s Sloan Senior Executive Program.

Tom Burniece is an independent business consultant with over 30 years of senior management experience in the networking and storage markets. He specializes in strategy formulation, business development, marketing, and due diligence. He has worked with well over 50 companies from unfunded startups to large public corporations, including venture and private equity firms. He is a highly experienced CEO and board member and has been general manager with profit and loss responsibility for a billion-dollar division of Digital Equipment. Before becoming an independent consultant, he was also Chairman of Ciprico and a senior executive at Maxtor and Control Data. He holds a BEE from the University of Minnesota and an MSEE from Arizona State University. He is also a graduate of MIT’s Sloan Senior Executive Program.

Wednesday, August 9th
8:30-10:50am
Forum R-21: Persistent Memory - Convergence of Storage and Memory Part 1 (Persistent Memory Track Track)
Session Sponsor: SNIA, JEDEC, & OpenFabrics Alliance (OFA)
Co-Organizer: Jonathan Hinkle, Principal Researcher, Lenovo

Chairperson: Alan Bumgarner, Senior Strategic Planner for Storage Software, Intel

Chairperson: Steffen Hellmold, Vice-President Technology Strategy, Western Digital

Organizer: Jim Pappas, Director, Initative Marketing, Intel Server Platforms Group

Paper Presenters:
Industry Update on Persistent Memory
Alan Bumgarner, Senior Strategic Planner for Storage Software, Intel

Using Persistent Memory in HPC Applications
Adrian Jackson, Research Architect, EPCC

Persistent Memory Applications
Tom Talpey, Networked Storage Architect, Microsoft

Session Description:
Session R-21- x101 Industry Update on Persistent Memory 8:30 - 9:35 am Session R-21- x102: Persistent Memory Applications 9:45 - 10:50 am Persistent memory offers storage at memory speed. No more waiting endlessly for slow disk accesses to occur or doing task switches to find something that can make progress during the wait. Obviously, the advance should mean higher speed and simpler programming for applications that do a lot of storage accesses, such as real-time data capture, deep analysis, intelligent response, and cognitive computing/machine learning. It should also be great for accelerating applications such as Oracle, SAP, noSQL, Hadoop, Ceph, object storage, and other databases and related platforms. But what about the software? It is currently all written and optimized for slow storage. Architects, developers, end user adopters, and vendors of today’s persistent memory must understand what development tools, platforms, management tools, and applications are currently available or in-progress to harness this new development in their systems.
About the Organizer/Moderator:
Jonathan Hinkle is Director, Systems Platform Technologist at Lenovo, where he drives new server architecture and technologies in their Enterprise Product Group. Previously, Jonathan was Storage and Memory Systems Architect at Viking Technology, where he developed next-generation memory and storage products and technologies. Before Viking, Mr. Hinkle worked at IBM where he developed server systems ranging from high-end enterprise boxes to blade servers. He is the chairman of the JC45.1 RDIMM committee and the Hybrid Memory Module task group in the JEDEC standards organization. He also invented and drove first development of the VLP DIMM and the SATADIMM SSD. He is a senior member of the IEEE and has a Bachelors and Masters degree in Computer Engineering from North Carolina State University. He is a member of the Program Executive Committee for Flash Memory Summit.

Alan Bumgarner is Senior Strategic Planner for Storage Software in Intel’s Datacenter Group. He focuses on front line technical support, remote server management of multiple datacenters, product/channel/technical marketing, field sales, and strategic product planning. With Intel for over 20 years, he earned a BS in Business Administration Systems from the University of Phoenix.

As Vice President of Technology Strategy within the WDC Corporate Strategy and Innovation organization, Steffen Hellmold is responsible for technology strategy development focusing on memory and storage technologies. He has over 20 years of industry experience in senior product and technical marketing, business development, and sales roles in volatile and non-volatile semiconductor memory, as well as in storage sub-systems. He has been deeply engaged in industry trade associations as well as standards organizations such as JEDEC, IEEE, USB-IF, CFA, SDA, and MMCA. He co-founded the USB flash drive alliance and served as its president. Steffen is also an Investor in storage companies including VeloBit (acquired by Western Digital) and Lara Networks (acquired by Cypress Semiconductor). He holds an economic electrical engineering degree (EEE) from the Technical University of Darmstadt, Germany.

Jim Pappas is the Director of Technology Initiatives in Intel’s Data Center Group. In this role, Jim is responsible to establish broad industry ecosystems that comply with new technologies in the areas of Enterprise I/O, Energy Efficient Computing, and Solid State Storage. Jim has founded, or served on several organizations in these areas including: PCI Special Interest Group, InfiniBand Trade Association, Open Fabrics Alliance, The Green Grid, and several emerging initiatives in his newest focus area of Solid State Storage. Jim currently is Vice Chair of the SNIA Board of Directors and Co-Chair of the SNIA Solid State Storage Initiative. Jim has previously been the Director of Technology Initiatives in Intel’s Desktop Products Group, and successfully led technologies such as AGP Graphics, DVD, IEEE 1394, Instantly Available PC, PCI, USB, and other advanced technologies for the Desktop PC. Jim has 30 years of experience in the computer industry. He has been granted eight U.S. patents in the areas of computer graphics and microprocessor technologies. He has spoken at major industry events including the Intel Developer’s Forum (IDF), WinHEC, Storage Networking World, PC Strategy, Microprocessor Forum, Consumer Electronics Show, Server I/O and the Applied Computing Conference. He holds a B.S.E.E. from the University of Massachusetts, Amherst, Massachusetts.

Wednesday, August 9th
3:20-5:45pm
Forum A-22: PCIe/NVMe Storage (NVMe/PCIe Storage Track)
Organizer: Deepankar Das, CTO, Sureline Systems

Organizer + Chairperson: Rakesh Cheerla, Product Manager, Xilinx

Paper Presenters:
NV-Array: Upgrading the NVMe Direct Attached Storage Pool with High Availability
Eric H Chang, Manager (Program Manager), SK Telecom / Network IT Convergence

Implementing Virtual NVMe for Flash-Storage Class Memory
Jinpyo Kim, Sr Staff Enginner, VMware

The PCI Express® 4.0 Architecture and Beyond
Debendra Das Sharma, Sr Principal Engineer/Director, Intel

Choosing the Right NVMe Server Storage Platform for Your Application
Stuart Campbell, ,

A New Standard for Remote Monitoring and Management of NVMe SSDs: NVMe-MI
David Woolf, Sr Engineer Datacenter Technology, UNH-IOL

Dual Port NVMe Offers Enterprise-Class Availability Plus High Speed
Anders Graham, Manager Product Marketing, Samsung Semiconductor

Session Description:
PCIe SSDs have rapidly emerged as the devices of choice in the enterprise because of their high speed, well-understood and widely used interface, and extensive support from major vendors. The NVMe standard for storage operations over PCIe offers a base platform comparable to those available for disk interfaces such as SAS and SATA. Furthermore, continuing advances in the underlying PCI Express interface (now in Version 4.0) offer a solid path for the future. Attention has now moved to implementing a wide range of essential system-level features in PCIe/NVMe. These include server storage platforms, standards for remote monitoring and management, high-availability features such as dual-porting, and virtual implementations for use with VMware.
About the Organizer/Moderator:
Deepankar Das is CTO of Sureline Systems, driving the leading edge in application mobility to allow machines, VMs, and applications to move seamlessly between physical, virtual, and cloud infrastructure. Before joining Sureline, he was Head of Engineering for the EMC Data Domain file system where he delivered the next generation Data Domain Data Protection in the Cloud products. He was previously Head of Software Engineering at MRAM startup Avalanche Technology, where he was in charge of creating software for a super-high-performance all-flash storage array, including Block/File Storage, Kernel/ Platform, HA/Clustering, Flash Management, SSD Firmware, and GUI. He has also been Head of Software Engineering at Violin Memory, where he was engineering leader for the overall Violin Software, including high performance vMOS stack, Violin-Symantec Data Management stack, OEM/Platform software, Target Device Drivers, Violin Memory Array Device Drivers, Virtualization, User Interface, and Release Engineering. He has also worked for EMC, Panasas, and Sun Microsystems. He earned a Master’s degree in computer science from Andhra University (India).

Rakesh Cheerla is currently Product Manager for Storage Solutions at Xilinx, where he focuses on data center design, hardware management, and open storage standards. He was previously Sr Director Products at CNEX Laboratories, a startup developing flash controller chips, where he was in charge of determining customer requirements and defining products to meet them. Before joining CNEX, he worked at SMART Modular Systems, LSI, and Extreme Networks. He has focused on developing product requirements, defining features, and managing engineering teams. He holds an MBA from Columbia University and an MSEE from Arizona State University.

Wednesday, August 9th
3:20-5:45pm
Forum C-22: SSD Technology (SSDs Track Track)
Organizer + Chairperson: Jody Glider, Storage Architect,, SAP Labs

Co-Organizer: Scott Shadley, VP Marketing, NGD Systems

Paper Presenters:
Memory Expansion Technology Using Software-Controlled SSD
Satoshi Kazama, Researcher, Fujitsu

AutoStream: Automatic Stream Management for Multi-stream SSDs
Changho Choi, Principal Engineer, Samsung Semiconductor

SSD Monitoring Software Aids in Systems Analysis and Failure Prediction
Zhenzhuo Dou, Manager, Samsung Electronics

Increasing Utilization of High-Perf SSDs by Adding Smart Storage Mgmt 2 Hadoop
Uma Gangumalla, Software Engineer, Intel

Session Description:
Enterprise SSDs are now a standard component in all data centers. So attention has moved to taking full advantage of them through the addition of features such as smart storage management, streams, monitoring software, and memory expansion technology. The emphasis is on more system-level software and the addition of features that have been popular with enterprise hard drive systems.
About the Organizer/Moderator:
Jody Glider is a Storage Architect at SAP Laboratories, where he leads a team that investigates the integration of the latest software-defined storage technologies into SAP’s cloud infrastructure. Before joining SAP, he spent almost 20 years as a Senior Technical Staff Member at IBM Almaden Labs. He has been a leader in developing commercial RAID arrays, storage virtualization platforms, and data reduction systems. He has also investigated ways of achieving cloud data privacy while retaining the advantages of data reduction. He holds 25 patents and has written 6 refereed conference and journal papers. He earned a BSEE from Rensselaer Polytechnic Institute (RPI).

Scott Shadley is a Principal Technologist, supporting Micron’s datacenter and enterprise SSD products including marketing initiatives. His responsibilities include roadmap definition, P&L ownership, customer engagement, and driving the marketing strategy for storage products. Previously, he was a Senior Product Marketing Team Manager, helped create the business development team within storage, and was a Product Marketing Manager for the SATA SSD programs. Scott has also been Director of Enterprise SSD Marketing at STEC. He earned a BSEE from Boise State University and an MBA from the University of Phoenix

Wednesday, August 9th
3:20-5:45pm
Forum E-22: Controllers and Flash Technology, Part 2 - Error Correcting Codes (Controllers Track Track)
Organizer + Chairperson: Kiran Gunnam, Technical Director of Algorithms and DSP, Velodyne LiDAR

Paper Presenters:
Overcoming Higher Bit Error Rates in New NAND Technologies
Song Wang, Chief Architect, Dera Storage

Novel 4K Error Correcting Code for QLC NAND
Shiuan Hao Kuo, Supervisor Engineer, Silicon Motion

Two-Level Code Construction Using LDPC Codes
Osso Vahabzadeh, Staff Design Engineer, Texas LDPC

Controller Technologies for Managing 3D NAND Flash Memories
Erich Haratsch, Director, Engineering Flash Channel Architecture, Seagate

A Flexible and Low-Complexity Local Erasure Recovery Scheme
Xinmiao Zhang, Associate Professor, Electrical & Computer Engineering, Ohio State Universiity

Power-Efficient LDPC Technology for High Performance SSDs
Jiangli Zhu, Sr Director, Via Technologies

Session Description:
This forum describes recent developments in implementing LDPC (low density parity check) and other codes for error correction in NAND flash memories. You will learn practical aspects of power-efficient LDPC implementations, handling new NAND technologies, and developing an erasure recovery scheme. Get important insight from industry experts and have time for direct questions and answers!
About the Organizer/Moderator:
Kiran Gunnam is Technical Director for Algorithms and DSP at Velodyne LiDAR, a styartup focused on computer vision for self-driving cars. He focuses on innovating on state of the art technologies in LiDAR signasl processing, object detection and tracking using machine learning, simultaneous localization, and mapping. He was previously a Technologist in Western Digital’s Storage Architecture Research Group, where he focuses on creating and developing new storage and computing related projects. He has also been Director of Engineering at Violin Memory and held R&D positions at Nvidia, LSI, Marvell, and Intel. Dr. Gunnam is an expert in IC implementation of communications and signal processing systems. His PhD research contributed several key innovations in advanced error correction systems based on low-density parity- check codes (LDPC) and led to several industry designs. He has done extensive work on ASIC hardware architecture, micro-architecture, and digital IC implementation for many applications (including IEEE 802.11n Wi-Fi, IEEE 802.16e WiMax, IEEE 802.3 10-GB, holographic read channel, HDD read channel, and flash read channel). Dr. Gunnam has over 60 patents with several others pending. He was an IEEE Solid State Circuits Society Distinguished Lecturer for 2013 and 2014. He received the MSEE and PhD in Computer Engineering from Texas A&M University.

Wednesday, August 9th
3:20-5:45pm
Forum M-22: 3-D Flash (New Memory Technologies Track Track)
Organizer: Shawn Adams, Product Marketing Manager, Micron

Organizer + Chairperson: Jung Yoon, Sr Technical Staff Member - Silicon Technology & Quality, IBM Procurement Engineering

Paper Presenters:
A Novel On-the-Fly NAND Flash Read Channel Parameter Estimation and Optimization
Tingjun Xie, Staff Engineer, Via Technologies

Is 3D NAND the Right Technology for Removable Devices?
Crystal Chang, Senior Manager, ATP Electronics

Using Flash Management to Improve 3D-NAND Reliaibility
Roman Pletka, Research Staff Member, IBM Zurich Research Lab

The Solution to the Bit Error Non-Uniformity of 3D NAND
Vic Ye, Manager of NAND Flash Analysis Team, SiliconGo

Critical Challenges and Solutions in 3D NAND Volume Manufacturing
Thorsten Lill, VP, Lam Research

3D NAND Status and Roadmap
Mark Webb, President, MKW Ventures

Session Description:
3D NAND flash continues to advance and will soon dominate flash technology because of its lower cost and higher density. Issues in its widespread use include error-correction methods, manufacturing challenges, reliability, and lifespan. Manufacturers will need to continue to improve 3D processes to meet the needs of many applications. Situations requiring high reliability and extended lifetimes will require a great deal more development effort.
About the Organizer/Moderator:
Shawn Adams is a Product Marketing Manager at Micron Technology, where he focuses on client SSD and NAND marketing. A 16-year veteran of the technology industry, he has led product development, strategy, and marketing for hardware and software portfolios. He has experience in both domestic and international markets and in a broad range of virtual market segments. Before joining Micron Technology, he worked for Healthwise, DBSI, and MPC. He holds an MBA from Northwest Nazarene University and a Bachelor’s in Business Administration from Idaho State University.

Jung Yoon is a Senior Technical Staff Member and Technology and Quality Lead in IBM’s Procurement Engineering Organization. He has over 25 years experience at IBM, where he is currently responsible for Advanced Memory Technology (DRAM, Flash, and SSD) Qualification and Quality Management across all server brands and applications. He is also responsible for IBM end-to-end manufacturing and customer quality support. He has presented at several conferences, including previous Flash Memory Summits. He received his PhD in Materials Science from Seoul National University (Korea)

Wednesday, August 9th
3:20-5:45pm
Forum R-22: Persistent Memory - Convergence of Storage and Memory Part 2 (Persistent Memory Track Track)
Session Sponsor: SNIA, JEDEC, & OpenFabrics Alliance (OFA)
Organizer: Jim Pappas, Director, Initative Marketing, Intel Server Platforms Group

Co-Organizer: Jonathan Hinkle, Principal Researcher, Lenovo

Chairperson + Speaker: Paul Grun, OpenFabrics Alliance Vice Chair; Storage I/O and Interconnect Architect, Cray

Chairperson: Vikas Agrawal, CTO, Cache Physics

Paper Presenters:
Persistent Memory over Fabrics - API Implementations
Tom Talpey, Networked Storage Architect, Microsoft

The Promise of Persistent Memory over Fabrics
Rob Davis, ,

Emerging Solutions for Persistent Memory - Part 3
Cyril Guyot, Director, Software Solutions and Algorithms, Western Digital

Emerging Solutions for Persistent Memory - Part 2
Tom Friend, Director of Industry Standards, SK hynix

Emerging Solutions for Persistent Memory - Part 1
Wendy Elsasser, Principal Design Engineer, ARM

Persistent Memory over Fabrics-How to Get There
Paul Grun, OpenFabrics Alliance Vice Chair; Storage I/O and Interconnect Architect, Cray

Session Description:
Persistent memory brings designers storage at memory speed for system acceleration and real-time data capture, analysis, intelligent response, and cognitive computing. New approaches will make persistent memory into more than just super-fast storage, offering software that enables persistent memory directly. Persistent Memory over Fabrics (PMoF) extends the persistent memory idea beyond a single computer into scalable networked configurations. However, work is needed to provide cache coherence and to balance speed and latency requirements. In this session, we will discuss in the first hour from 3:20 – 4:25 pm Emerging Solutions for Persistent Memory. Following the break, from 4:40 pm – 5:45 pm, we will discuss Persistent Memory over Fabric.
About the Organizer/Moderator:
Jim Pappas is the Director of Technology Initiatives in Intel’s Data Center Group. In this role, Jim is responsible to establish broad industry ecosystems that comply with new technologies in the areas of Enterprise I/O, Energy Efficient Computing, and Solid State Storage. Jim has founded, or served on several organizations in these areas including: PCI Special Interest Group, InfiniBand Trade Association, Open Fabrics Alliance, The Green Grid, and several emerging initiatives in his newest focus area of Solid State Storage. Jim currently is Vice Chair of the SNIA Board of Directors and Co-Chair of the SNIA Solid State Storage Initiative. Jim has previously been the Director of Technology Initiatives in Intel’s Desktop Products Group, and successfully led technologies such as AGP Graphics, DVD, IEEE 1394, Instantly Available PC, PCI, USB, and other advanced technologies for the Desktop PC. Jim has 30 years of experience in the computer industry. He has been granted eight U.S. patents in the areas of computer graphics and microprocessor technologies. He has spoken at major industry events including the Intel Developer’s Forum (IDF), WinHEC, Storage Networking World, PC Strategy, Microprocessor Forum, Consumer Electronics Show, Server I/O and the Applied Computing Conference. He holds a B.S.E.E. from the University of Massachusetts, Amherst, Massachusetts.

Jonathan Hinkle is Director, Systems Platform Technologist at Lenovo, where he drives new server architecture and technologies in their Enterprise Product Group. Previously, Jonathan was Storage and Memory Systems Architect at Viking Technology, where he developed next-generation memory and storage products and technologies. Before Viking, Mr. Hinkle worked at IBM where he developed server systems ranging from high-end enterprise boxes to blade servers. He is the chairman of the JC45.1 RDIMM committee and the Hybrid Memory Module task group in the JEDEC standards organization. He also invented and drove first development of the VLP DIMM and the SATADIMM SSD. He is a senior member of the IEEE and has a Bachelors and Masters degree in Computer Engineering from North Carolina State University. He is a member of the Program Executive Committee for Flash Memory Summit.

and Data Management group, where he focuses on applying I/O technology to building large-scale systems. He is also a member of the InfiniBand Trade Association’s Steering Committee and chair of the Technical Working Group. He was chair and principle author for the working group responsible for creating the RoCE (RDMA over Converged Ethernet) specification. He also played a key role in creating the InfiniBand transport protocol. During his more than 30 year career, he has been intimately involved in all aspects of server I/O beginning with storage for large mainframe systems and,turning to high performance network architecture. He earned a BSEE from Syracuse University.

Vikas Agrawal is founder and CTO at CachePhysics, which is developing the next generation dynamic tuning software for data centers. Vikas is a 21-year industry veteran of the Memory and Storage industry with last 5 years driving strategy and technology leadership in office of CTO at Toshiba’s Storage business unit. Vikas drove the strategy of emerging non-volatile memory solutions (MRAM, ReRAM, NAND Flash, SSDs) and storage solutions strategy at Toshiba by comprehending changes to all layers of the ecosystem from end applications through the software and hardware layers. Prior to joining Toshiba in June 2012, Vikas led the Strategy and Product management for Micron’s Enterprise PCIe SSD portfolio.Prior to Micron, Vikas drove the strategy, product management and business development for Enterprise and Client SSD controllers at LSI Corporation. Prior to LSI Corp, Vikas spent 10 years at Texas Instruments in Engineering and Architect roles responsible for high speed cache memory in processors.

Coming soon..

Thursday, August 10th
Thursday, August 10th
8:30-10:50am
Forum A-31: PCIe/NVMe Development Issues (NVMe/PCIe Storage Track)
Co-Organizer: Rakesh Cheerla, Product Manager, Xilinx

Organizer + Chairperson: Deepankar Das, CTO, Sureline Systems

Paper Presenters:
Examining Latency of NVMe SSDs for Time-Critical Applications
John Gatch, Sr Team Lead - Performance Engineering, Western Digital

NVMe Direct 2.0: An Enhanced User-space I/O Framework for NVMe SSDs
Hyeongjun Kim, ,

Developing Low Latency NVMe Systems for Hyperscale Data Centers
Engling Yeo, VP Engineering, GOKE US RESEARCH LABORATORY

Making the Right Power/Performance Tradeoffs for NVMe SSDs
Rick Huang, ,

Designing Next-Generation FS for NVMe and NVMe-oF
Liran Zvibel, CTO And Co-Founder, WekaIO

Session Description:
PCIe SSDs have rapidly emerged as the devices of choice in the enterprise because of their high speed, well-understood and widely used interface, and extensive support from major vendors. The NVMe standard for storage operations over PCIe offers a base platform comparable to those available for disk interfaces such as SAS and SATA. A further step in its acceptance is the development of a wide variety of added facilities. They include more efficient I/O frameworks (typically open-source), solutions for performance and power tradeoffs, ways to handle latency problems, and specially designed software such as file systems. Obviously, such added facilities grow the PCIe/NVMe ecosystem, further encouraging developers to use it in their storage systems.
About the Organizer/Moderator:
Rakesh Cheerla is currently Product Manager for Storage Solutions at Xilinx, where he focuses on data center design, hardware management, and open storage standards. He was previously Sr Director Products at CNEX Laboratories, a startup developing flash controller chips, where he was in charge of determining customer requirements and defining products to meet them. Before joining CNEX, he worked at SMART Modular Systems, LSI, and Extreme Networks. He has focused on developing product requirements, defining features, and managing engineering teams. He holds an MBA from Columbia University and an MSEE from Arizona State University.

Deepankar Das is CTO of Sureline Systems, driving the leading edge in application mobility to allow machines, VMs, and applications to move seamlessly between physical, virtual, and cloud infrastructure. Before joining Sureline, he was Head of Engineering for the EMC Data Domain file system where he delivered the next generation Data Domain Data Protection in the Cloud products. He was previously Head of Software Engineering at MRAM startup Avalanche Technology, where he was in charge of creating software for a super-high-performance all-flash storage array, including Block/File Storage, Kernel/Platform, HA/Clustering, Flash Management, SSD Firmware, and GUI. He has also been Head of Software Engineering at Violin Memory, where he was engineering leader for the overall Violin Software, including high performance vMOS stack, Violin-Symantec Data Management stack, OEM/Platform software, Target Device Drivers, Violin Memory Array Device Drivers, Virtualization, User Interface, and Release Engineering. He has also worked for EMC, Panasas, and Sun Microsystems. He earned a Master’s degree in computer science from Andhra University (India).

Thursday, August 10th
8:30-10:50am
Forum E-31: Flash Controller Design Options (Controllers Track Track)
Organizer + Chairperson: Roman Pletka, Research Staff Member, IBM Zurich Research Lab

Paper Presenters:
Machine Learning for Storage Systems based on 3D NAND
Wei Lin, System Architect, Phison Electronics

FPGA-based NVMe Controller with Acceleration for Search and In-Memory Computing
Bharad Pudipeddi, CTO, NVXL Technology

A Self-Learning Flash Translation Layer (FTL) for NAND Flash Controllers
Hao Zhi Lee, Manager, Phison Electronics

Uniform & Concentrated Read Disturb Effects in TLC NAND Flash Memories
Cristian Zambelli, Assistant Professsor, University of Ferrara (Italy)

High-Throughput Low-Power Finite Alphabet Iterative Decoders
Shiva Planjery, CEO, CodeLucida

Session Description:
NAND flash technology has produced several breakthroughs in the last few years which have consolidated its position as the leading type of nonvolatile memory. What’s in store now? Will there be new types of 3-D technology? How about variations on QLC providing even more levels in a cell? How about new approaches to scaling cells that could provide higher performance and less wear? There are many possibilities out there, but the investment is high and the simple concepts have already been developed. Obviously, the lack of any major breakthrough would help open the door to other non-volatile technologies such as MRAM, RRAM, 3D XPoint, and memristors.
About the Organizer/Moderator:
Roman Pletka is a research staff member for cloud storage and security at the IBM Zurich Research Laboratory where he focuses on non-volatile memory technologies in storage systems. He has published 20 articles and obtained over 50 patents in security, scalability, and availability of distributed storage systems as well as quality-of-service in high-speed networks, active networks, and network processors. He has made presentations at many international conferences including the ACM International Conference on Systems and Storage (SYSTOR) and the Nonvolatile Memory Workshop. He has over ten years experience in storage systems research. He earned a PhD in computer networking from ETH Zurich, Switzerland and an MS in the same subject from EPFL (Swiss Federal Institute of Technology of Lausanne).

Thursday, August 10th
8:30-10:50am
Forum M-31: Persistent Memory Tools and Applications (Persistent Memory Track Track)
Organizer + Chairperson: Jonathan Hinkle, Principal Researcher, Lenovo

Organizer: Doug Finke, Director, Product Marketing, Xitore

Paper Presenters:
IOPS and QoS Analysis of DRAM-Based and 1Gb All-MRAM Based NVRAM Cards
Lorenzo Zuolo, Doctoral Student, University of Ferrara (Italy)

Application Benefits of Storage Class Memory
Kevin Wagner, VP Marketing, Diablo Technologies

Emerging Opportunities for Non-Volatile Memories in Video Games
John Carlsen, Consultant, Syncopated Systems

Where Do Storage-Class Memory Technologies Fit?
ErXuan Ping, Managing Director, Applied Materials

NVMe SSD with Persistent Memory Region (PMR
Chander Chadha, Sr Product Marketing Manager, Toshiba

Session Description:
Persistent memory is a powerful technology that blurs the lines between memory and storage. It can provide much higher performance for a wide range of applications, including in-memory databases, servers, gaming, high-performance computing, and storage systems. Persistent memory is an essential ingredient for meeting real-time requirements and handling big data.
About the Organizer/Moderator:
Jonathan Hinkle is Director, Systems Platform Technologist at Lenovo, where he drives new server architecture and technologies in their Enterprise Product Group. Previously, Jonathan was Storage and Memory Systems Architect at Viking Technology, where he developed next-generation memory and storage products and technologies. Before Viking, Mr. Hinkle worked at IBM where he developed server systems ranging from high-end enterprise boxes to blade servers. He is the chairman of the JC45.1 RDIMM committee and the Hybrid Memory Module task group in the JEDEC standards organization. He also invented and drove first development of the VLP DIMM and the SATADIMM SSD. He is a senior member of the IEEE and has a Bachelors and Masters degree in Computer Engineering from North Carolina State University. He is a member of the Program Executive Committee for Flash Memory Summit.

Doug Finke is Director Product Marketing at Xitore, a startup developing very high-performance NVDIMM-based SSDs. Doug is focused on increasing industry awareness of NVDIMMs and persistent memory through writing whitepapers, talking to storage industry media, and appearing at conferences such as Persistent Memory Summit and Flash Memory Summit. He has been a key contributor in the computer, semiconductor, and storage industry for over 30 years. Before joining Xitore, Doug was at HGST where he was responsible for business management of large petabyte scale storage systems. Before that Doug served as Senior Director of Product Marketing at sTec (acquired by HGST) which pioneered the concept of solid state drives (SSDs) for use in enterprise computing applications. He holds seven patents related to NVDIMM design. He earned an MBA from MIT and a BS in Computer Engineering from the University of Illinois.

Thursday, August 10th
8:30-10:50am
Forum R-31: NVDIMMs: Powerful Persistent Memory Arrives in a Familiar Form (Persistent Memory Track Track)
Session Sponsor: SNIA
Chairperson + Speaker: Jeff Chang, VP Marketing, AgigA Tech

Organizer: Arthur Sainio, Director Product Marketing, SMART Modular Technologies

Paper Presenters:
A New NVDIMM Variant that Offers Memory & Storage Through a Single Interface
Brian Peterson, Sr VP Sales/Marketing, Netlist

New NVDIMM Architecture Offers a Fast SSD on the Memory Bus
Doug Finke, Director, Product Marketing, Xitore

Benchmarking Persistent Memory in Computers
Adam McPadden, Memory Development, IBM

SQL Server Performance with NVDIMMs
Lee Prewitt, Principal Program Manager, Microsoft

NVDIMM Applications: Practical Uses of Storage at Memory Speeds
Rob Peglar, Independent Consultant, Advanced Computing and Storage

Session Description:
Part 1: NVDIMM Applications: Practical Uses of Storage at Memory Speeds 8:30 - 9:35 am Non-volatile DIMMs (or NVDIMMs) offer byte-addressable storage at memory speeds, providing dramatic performance increases for computer and communications systems. Applications no longer need to wait for slow storage accesses or perform complex task switches to keep processors busy. The advantages are particularly significant for database searches, business analytics, transactions, and financial data processing. Big data can be handled much faster, and latency is reduced greatly. Part 2: NVDIMMs with a Twist 9:45 -10:50 am Persistent memory is a powerful technology that blurs the lines between memory and storage. It can increase performance greatly for many applications, including in-memory databases, servers, gaming, high-performance computing, and storage systems. Persistent memory is an essential ingredient for meeting real-time requirements and handling big data. However, practical uses require both a reasonable hardware implementation and a high level of software support. The end result is that persistent memory will take some time to implement in mainstream applications.
About the Organizer/Moderator:
Jeff Chang is VP of Sales, Marketing and Business Development at AgigA Tech, a pioneer in the development of NVDIMM technology. He is responsible for product strategy, definition, and rollout as well as customer and partner relationships. He has also focused on the promotion and evangelization of NVDIMM technology to the industry at-large through conference appearances, articles in the trade and technical press, webinars, and webcasts. Jeff is co-chair of the NVDIMM Special Interest Group (SIG) within SNIA/SSSI. Before joining AgigA Tech, he has held executive management and marketing positions at Entropic Communications, Staccato Communications, and Cypress Semiconductor. Mr. Chang has built and managed successful product portfolios spanning multiple end user markets including personal computing, consumer electronics, mobile handsets, enterprise systems and operator-class communication systems. He holds a BSEE from the University of Washington.

Arthur Sainio is a Director of Product Marketing at SMART Modular Technologies. Arthur has been driving new product launch and business development activities at SMART since 1998. Prior to SMART, Arthur worked as a Product Marketing Manager at Hitachi Semiconductor America supporting DRAM, SRAM and Flash technologies. Arthur holds a MBA from San Francisco State University and a MS from Arizona State University.

Thursday, August 10th
8:30-10:50am
Forum V-31: Flash Storage Networking (Enterprise Storage Track Track)
Organizer + Chairperson: KRS Murthy, CEO, I Cubed

Paper Presenters:
Ideal Ethernet Switch for Enterprise Flash Storage
Amit Katz, Vp Worldwide Ethernet Switch Sales, Mellanox Technologies

Developing the Right Infrastructure for Networked Flash Storage
Marcus Thordal, Director Technical Solutions, Brocade

Accelerate Access to Networked Flash with FC-NVMe
Nishant Lodha, Sr Technical Marketing Manager, Cavium

Achieving Ultra-High Networking Throughput using TCP Acceleration
, ,

Networking NVMe-based Flash with TCPIP Using the Protocol Everyone Knows
Muli Ben Yehuda, CTO and Co-Founder, Lightbits Labs

Scaling NVMe Storage Networks to Thousands of Drives
Bob Hansen, Vp Solutions Architecture, Apeiron Data Systems

Session Description:
Flash storage networking allows systems to access flash memory regardless of where it is located. The advantages are higher utilization and simpler expansion and scalability. The disadvantages are greater complexity, more difficult maintenance, and higher latency (particularly if an access runs into a competitive situation, sometimes known as a “noisy neighbor). Of course, there are many decisions to be made, including protocols to be used and methods for accelerating network responses which can often be quite slow.
About the Organizer/Moderator:
KRS Murthy is an experienced venture capitalist, serial entrepreneur and corporate strategist. He is currently focused on mergers and acquisitions, corporate governance, and competitive strategy. He has developed national level technology and industry strategies in multiple key areas. He has led many companies at many different stages and has grown companies to sales of over $500 million. He is a popular speaker at conferences around the world and a leader in many technical societies, including IEEE Nanotechnology Council, IEEE Engineering Management Society, IEEE Computer Society, Silicon Valley Engineering Council, and IEEE Standards Board. Murthy also has experience as a USA Country Manager for AT&T and AT&T Bell Labs and as a professor of computer engineering at California State University, Pomona & Fullerton. He has received a Distinguished Service Award from the IEEE Engineering Management Society and a Distinguished Achievement Award from the President of India.

Thursday, August 10th
1:30-4:15pm
Forum C-32: SSD Concepts (SSDs Track Track)
Organizer: Mike Gluck, VP/CTO, Sanity Solutions

Organizer + Chairperson: Sam Nemazie, CTO/Acting President, Prossimo Technology

Paper Presenters:
Creating SSD Designs That Can Readily Be Migrated Between Form Factors
Feng Tang, Senior Manager Firmware Design, Starblaze Technology

M.3, a Flexible Advanced Form Factor for Enterprise SSDs
David Wang, ,

Write Cliff Causes and Mitigation Techniques
Erich Hanke, Principal Engineer, Intelliprop

Evaluating Error Recovery of SSD Media Via Simulation Based on Real Data
Erich Haratsch, Director, Engineering Flash Channel Architecture, Seagate

Datacenter Workload Analysis & Qualification of SSD Storage Servers
Eden Kim, CEO, Calypso Systems

Session Description:
SSDs are playing a critical role in enterprise applications. Enterprise end users, storage designers, and engineers need to understand how the choices of NAND flash memory and controllers affect performance, endurance, and the resulting applications. This session will give participants important information on new developments in SSDs including new form factors, improved workload analysis, and performance declines that occur as disk fill up.
About the Organizer/Moderator:
Mike Gluck is VP/CTO at Sanity Solutions, a data management solutions provider that customizes and integrates intelligent solutions across storage, data protecton, cybersecurity, cloud computing, and data center infrastructure. Mike is a storage industry veteran with over 35 years of experience in the computer and data storage industries. His focus is on helping clients craft innovative data management solutions that provide distinctive value and competitive advantages for their strategic business goals. Internally, he analyzes key IT trends, paradigm shifts and disruptive technologies, searching for leading-edge vendors and products that can provide differentiation and competitive advantages for clients. Before joining Sanity Solutions, Mike held executive and management positions with Chaparral Network Storage, Fujitsu, Pivot3, Vanguard Technologies, and Xiotech. Mike earned a BS in Engineering from the University of Wisconsin and an MBA from the University of Chicago.

Sam Nemazie is CTO/Acting President at Prossimo Technology, a startup focused on new developments in storage technology. He was previously Chief System Architect at Avalanche Technology where he focused on system applications and all-flash arrays based on MRAM. He has also been VP Engineering at Lexar Media, where he was responsible for SSD and flash controllers, including both firmware and system development. Earlier in his career, he spent many years at Sr Director Hard Drive Controller Development at Cirrus Logic. He earned MSEE and BSEE degrees from the University of Michigan. He holds over 70 patents in storage systems, solid-state drives (SSDs), non-volatile memory, and storage controllers.

Thursday, August 10th
1:30-4:15pm
Forum L-32: Super-High Data Rates Open up a New World of Mobile Applications (Consumer/Mobile Applications Track Track)
Session Sponsor: UFSA
Chairperson: Desi Rhoden, Executive VP, Montage Technology

Organizer: HeeChang (Steve) Cho, Chairperson, UFSA Marketing Committee, UFSA

Panel Members:
Panelist: Robert Hsieh, Product Marketing Director, Silicon Motion

Panelist: Mikko Valimaki, CEO, Tuxera

Panelist: Zhineng Fan, Sr Field Applications Engineer,, Amphenol

Panelist: Hezi Saar, Product Marketing Manager, Synopsys

Panelist: L.C. Tai, VP Sales/Marketing, Dediprog

Panelist: Keith Tsai, Account Manager, Phison Electronics

Panelist: Perry Keller, Program Manager, Standards & Applications, Keysight Technologies

Panelist: Lee Prewitt, Principal Program Manager, Microsoft

Session Description:
Mobile is everywhere today with billions of cellphones as well as health monitors, drones, wearables, instruments, data collection devices, cameras, tablets, music players, toys, vehicles, and much more. However, users and developers alike want higher data rates, more standardization and interoperability, more powerful protocols, and easier handling of documents, video, images, and other data types. The answer is UFS! Universal Flash Storage (UFS) cards offer new higher levels of performance in a standard form. They can do the job for 4K/8K video, 3D games, virtual and augmented reality, high-resolution cameras, surveillance systems, cloud data storage, and other applications we cannot yet imagine. UFS also has fully documented standards along with a certification program, compatibility tests, strong industry backing, and a large ecosystem of hardware, software, and services suppliers. It is the right memory platform for mobile everywhere, which will connect the whole world and make resources available to everyone at any time.
About the Organizer/Moderator:
Desi Rhoden has been a key figure in semiconductor standards for many years. He initiated the spinoff of JEDEC as an independent organization and led the coordination with Chinese organizations and industry, firmly establishing JEDEC as the worldwide leader in semiconductor industry standards. He has been JEDEC’s Chairman of the Board and is currently chairman of the JC-42 Memory Committee. Desi has also helped establish the semiconductor industry as a major worldwide business. He was one of the first to recognize the importance of industry coordination and the building of international relationships, particularly in Asia. His current day job is as Executive Vice President of Montage Technology, a producer of low power, high performance mixed signal devices for data centers and smart entertainment. At Montage, Desi has coordinated business development and professional relationships with all the key players in the memory industry. Montage is now an established leader in memory interface logic and the only vendor with DDR3 and DDR4 full buffer solutions validated by the industry leaders.

Hee Chang (Steve) Cho is a Principal Engineer and Software Architect at Samsung Electronics, where he focuses on standards and the development of firmware, specifications, and IP. He has been Vice-Chair of the JEDEC JC64.1 committee on embedded memory storage and removable memory cards and Marketing Committee Chairperson for UFSA. He holds over 20 patents in storage, security, and memory. He earned his Master’s and Bachelor’s in computer science at KAIST, the Korean Advanced Institute of Science and Technology in Daejong, Korea.

Thursday, August 10th
1:30-4:15pm
Forum W-32: NVMe over Fabrics (NVMe-oF) (NVMe-oF Track Track)
Paper Presenters:
NVMe over TCP: Networking NVMe with a Popular Protocol
Tom Spencer, Senior Director, Solarflare

Using FPGAs to Accelerate NVMe-oF-Based Storage Networks
Deboleena Sakalley, Principal Engineer, Xilinx

Architectural Overview of an All Flash Edge Computing Platform for IoT
Ram Johri, Systems Architect, Flashmatrix, Toshiba

Enabling Next-Generation Storage Fabrics with NVMe-oF I/O Processors
Benoit Ganne, Field Application Engineer, KALRAY

Low-Overhead Flash Disaggregation via NVMe-over-Fabrics
Vijay Balakrishnan, ,

Accelerating Remote Virtual Machine Access with SPDK
Jim Harris, Principal Software Engineer, Intel

Session Description:
NVM Express over Fabrics (NVMe-oF) enables users to connect remote subsystems with a flash appliance to achieve faster application response times and better scalability across virtual data centers. NVMe over fabrics offers high transfer speeds, low latency, full standardization, and access to a large ecosystem. Data centers can employ it to get higher utilization, huge performance benefits, and high levels of scalability over hundreds or thousands or local and remote SSDs. It is thus well-suited to large sites such as clouds, megawebsites, and hyperconverged data centers.
About the Organizer/Moderator: